Benoit Dufort

On-chip analog signal generation for mixed-signal built-in self-test

A new method for generating analog signals with very low complexity and hardware requirements has recently been introduced. It consists of periodically reproducing short optimized bitstreams recorded from the output of a sigma-delta modulator. In this paper, various types of signals generated using the bitstream approach are discussed. Two different silicon implementations are presented, and their performance is analyzed through experimental results. Various ways in which the generators can be used are also demonstrated. Emphasis is placed on the simplicity of the design process and its compact implementation, which are crucial considerations when implementing a built-in self-test strategy.

Signal generation using periodic single and multi-bit sigma-delta modulated streams

This paper describes a new method to generate analog signals with high precision at very low hardware complexity. This method consists in reproducing periodically a recorded portion of the bitstream output of a sigma-delta modulate. This technique utilizes less hardware than conventional frequency synthesis methods and does not require a multi-bit DAC. However when a multi-bit DAC is already available, the technique can be used to increase the quality of the signal in the frequency band of interest using existing hardware. The paper demonstrates how this method can be used to generate signals for Built-in Self-Test and standard Analog and Mixed-Signal Test. Experimental results illustrating the design simplicity and low overhead are given.

On-chip analog signal generator for mixed-signal built-in self-test

A new method for generating analog signals with very low complexity and hardware requirements has recently been introduced. In this paper, two different silicon implementations are presented and their performance is analyzed through different experimental results. Various ways in which the generators can be used are also demonstrated. Emphasis is placed on the simplicity of the design process and its compact implementation, which are crucial considerations when implementing a Built-In Self-Test (BIST) strategy.

Making complex mixed-signal telecommunication integrated circuits testable

This article presents a discussion of several methods that can be used to improve the testability of complex mixed-signal telecommunication integrated circuits. We begin by outlining the role of test and its impact on product cost and quality. A brief look at the pending test crises for mixed-signal circuits is also considered. Subsequently, we outline the evolution of test strategies with time, and their corresponding test setups for verifying the function of the analog portion of a mixed-signal circuit. The article also describes several circuit techniques for improving test access and providing built-in self-test solutions for telecommunication circuits.

Increasing the performance of arbitrary waveform generators using periodic sigma-delta modulated streams

This paper describes a new method to increase the performance of existing arbitrary waveform generators (AWGs). By encoding the digital words using sigma-delta (/spl Sigma//spl Delta/) techniques, it is possible to decrease the noise floor in a narrow band while keeping the same memory requirements. Calibration techniques to deal with the nonidealities of the AWG are also presented and verified experimentally. Improvements in spurious free dynamic ranges (SFDRs) of over 40 dB will be demonstrated with commercial test equipment.

Analog test signal generation using periodic ΣΔ-encoded data streams

Preface. 1. Introduction. 2. Mixed-Signal Testing. 3. Periodic SigmaDelta Bit Stream Theory. 4. Analog Signal Generation. 5. Integrated Circuit Prototypes. 6. Application to Arbitrary Waveform Generators. 7. Conclusions. References. Index.

Increasing the performance of arbitrary waveform generators using sigma-delta coding techniques

This paper describes a new method to increase the performance of existing arbitrary waveform generators. By encoding the digital words using sigma-delta techniques, it is possible, with the simple addition of an analog filter, to decrease the noise floor in a narrow band while keeping the same memory requirements. Calibration techniques to deal with the non-idealities of the arbitrary waveform generator are also presented and verified experimentally.

Mixed-Signal Testing

The cost to produce mixed-signal devices is being dominated by their analog test costs. Today, the cost to test the analog portion of a mixed-signal device can be as high as 50% of the total cost. While the benefits of new market opportunities generally offset these costs, it is the general trend that has the mixed-signal device manufacturer concerned. As the rate of introduction of new technologies seems to favor the digital portion of the mixed-signal device, it would seem that in the next few years the cost associated with manufacturing a mixed-signal device will be almost entirely due to the cost of the analog tests. This situation is depicted in Fig. 2-1 through the use of two pie charts. The pie chart on the left-hand side attempts to capture the break down of production costs associated with a mixed-signal IC whereas the pie chart on the right projects these test costs into the future based on current trends. Clearly, the future situation appears quite grim. A product, even after succeeding in establishing itself on the market, will not persist and survive in the long run unless its performance and cost effectiveness remains competitive relative to other ICs. It is therefore readily apparent to electronic manufacturers today that the cost of test for the analog portion of the mixed-signal device can no longer be ignored, as the eventual market winners will be those products that contribute to the lowest overall test cost. It has also been claimed that improved product testability can aid in getting a product to the market place faster even though the design cycle is prolonged. This is largely a result of improved diagnostic capability.

SOI high voltage power FET with an internal voltage (current) sensing terminal

This report describes the novel use of the field-plate in a SOI HV power FET as a V/sub DS/ sensing terminal. The sensing terminal can be used in over-voltage protection schemes without the need of an external clamping circuit. We have shown that this scheme can be employed without any degradation of the power FET performance.

Arbitrary band-limited pulse generation for built-in self-test applications

This paper describes a new technique to generate a variety of arbitrary band-limited pulse shapes that can be used efficiently in built-in self-test applications. The proposed method requires very little area and the same hardware can be used to generate pulses of different shapes. This is particularly useful in testing receivers with different pulse shapes coming from the transmission medium such as a twisted pair cable. Experimental results from an on-chip CMOS generator are also be given.