Beth Keser

A study of wafer level package board level reliability

Board level reliability studies have been performed on wafer level packages (WLP) with various solder ball alloys, underbump metallurgy compositions, and redistribution (RDL) metal thicknesses. All of the WLPs studied pass drop shock with the thicker RDL having the best performance. In contrast to drop shock, thicker RDL did not significantly improve thermal cycle on board reliability. A WLP with no underbump metallurgy (UBM) passed drop shock, but the temperature cycle performance was marginal. A WLP with Ni-doped alloy and NiCu UBM passed drop shock; however, this Ni-rich joint failed temperature cycle.

Electromigration of solder balls for wafer-level packaging with different under bump metallurgy and redistribution layer thickness

Electromigration (EM) has been conducted on lead-free solder balls in wafer-level packages for different redistribution layer (RDL) thicknesses, under bump metallurgy (UBM) schemes, and lead-free solder alloys. Two different types of EM-induced voids were observed at the electron-source side: pancake void between the solder/RDL interface and through-thickness voids in the RDL. In both cases, voids formed at the interface of CuSn intermetallic compound and solder. A Ni-layer in the UBM was found to prolong EM lifetime by slowing the diffusion of Sn into the Cu RDL relative to a Cu-only UBM. The absence of UBM led to the shortest EM lifetime due to direct contact of solder to RDL. Also, a thicker RDL extended lifetime proportionately to the decrease in current density and Joule heating at the critical interface. On the other hand, adding Ni and Ge to the SAC alloy did not statistically impact lifetime.

The impact of different under bump metallurgies and redistribution layers on the electromigration of solder balls for wafer-level packaging

Electromigration performance has been characterized for lead-free solder balls in wafer-level packaging for different solder metallurgy, under bump metallurgy thickness, and redistribution layer thickness and composition. The electromigration lifetimes in this study were found to strongly correlate with the thickness of under bump metallurgy as well as redistribution layer, spanning more than an order-of-magnitude in median time to failure. Also, a redistribution layer comprising of a Ni/Cu bilayer led to a significant lifetime improvement over its Cu-only counterpart, while a change in solder composition did not affect lifetime. Through extensive failure analysis, the differences in lifetimes can be linked to the amount CuSn formation as determined by the under bump metallurgy thickness as well as the location of the CuSn formation as determined by the redistribution layer thickness. Finally, activation energy has been characterized for a process leg with Cu redistribution layer and under bump metallurgy to be 1.34eV, and a current density exponent to be 3.8.

Interconnect reliability prediction for wafer level packages (WLP) for temperature cycle and drop load conditions

Interconnect reliability of wafer level packages (WLP) is one of the major concerns because of the direct connection of die to board without any substrate interposer. The dominant failure modes due to temperature cycling and drop include cracks in bulk solder, crack at pad to IMC interface, and RDL cracking at UBM interface. A number of factors affect this reliability; such as UBM/Pad size, bump density, bump depopulation, and die size and thickness. In addition, WLPs come in different flavors (UBM vs. No UBM,) which also have implications on interconnect reliability. With increasing die size, it is becoming critical to investigate this reliability very early in the product design cycle using simulations. Although simulations are very helpful in performing relative comparison to investigate design options, their utility can be further enhanced by developing life prediction models to determine if a certain design will meet customer reliability requirements for the end use application. This paper discusses a finite element modeling based approach to establish such a life prediction model. Failure data on various test vehicles were collected using board level temperature cycle and drop test methods. This data covered a large range of WLP designs including various die sizes, bump pitches, bump densities, UBM/Pad sizes, fab nodes, and WLP structures. Each of these data points were then simulated using a detailed 3-D finite element modeling approach to compute strain energy density (SED) per cycle for temperature cycle conditions. Similarly, drop tests were simulated to determine drop damage parameters (Stress, Strain, Strain energy density) at various interfaces and RDL trace. The models incorporate every detail of package geometry including die size, solder bump dimensions from measurement, detailed structure below and above solder bump such as back end of line (BEOL), polymer layers, redistribution layers (RDL), UBM, and copper pad. Material properties were also measured of test boards to improve model accuracy and published creep constitutive equations were used for simulating non-linear behavior of solder joints due to temperature cycling and drop loading conditions. The values of damage parameters determined from finite element modeling were then plotted against the mean life (50% failure rate) to establish the fatigue life prediction model. A power law curve fitting with a correlation coefficient of greater than 95% resulted in fatigue life exponent of approximately -1 for solder fatigue, which is consistent with previous life prediction models. Since the intent was to use the model to predict first failures and 5% failure rate, Weibull analysis and test database was used to determine ratios of lower limits of 5% life at 90% confidence to mean life. The combined use of highly accurate finite element modeling and statistical analysis of test database provides greater confidence in predicting reliability and thus a useful tool for assessing and optimizing design very early in the design phase.

Board level reliability and surface mount assembly of 0.35mm and 0.3mm pitch wafer level packages

Board level reliability studies have been performed on wafer level packages (WLP) on various die sizes with 0.35mm and 0.3mm ball pitches. The 0.35mm pitch test vehicles included 4mm × 4mm, 5mm × 5mm, and 6mm × 6mm package sizes. The 0.3mm pitch test vehicles were 3mm × 3mm and 4mm × 4mm. All test vehicles were fully populated ball arrays. The parts were assembled at 2 different suppliers. All of the WLPs studied passed drop shock. All of the test vehicles passed board level temperature cycle initially except for the 6mm × 6mm. The SMT process optimization included variations of stencil aperture ratios. These modifications impacted temperature cycling reliability. The reliability of the largest package size was improved from this optimization.

Study of new alloy composition for solder balls - Identifying material properties as key leading indicators toward improved board level performance

The quest for improved board level reliability (BLR) in wafer level packages (WLPs) motivates a characterization of novel alloys, and their impact on BLR. Previous studies on lead free solders have shown the effects of alloy composition on silver precipitation, creep behavior, and IMC formation in SnAgCu (SAC) alloys. Studies have shown that the solder ball alloy needs to have ductility to absorb the stresses related to CTE mismatch, drop shock (DS), and temperature cycle test (TCT). Depending on alloy composition, it has been widely accepted that there has to be necessary tradeoff between mechanical properties that are needed to have robust drop shock characteristics versus temperature cycle robustness. Studying solder balls of new alloy compositions should help assist the packaging engineer to identify what material properties could be key leading indicators to help improve BLR. Existing SAC alloys like SAC305, SAC405, SAC105, etc have properties that have been widely accepted to have a necessary tradeoff qualities in mechanical properties built-in to the alloy system to achieve the right drop shock characteristics versus temperature cycling requirements. [1-7] The “tradeoff” is primarily due to inherent ductile property of regular SnAgCu (SAC) alloy that could potentially have a reverse effect to the drop shock and temperature cycling performance of a package.