Bimal P. Mathur

Neuromorphic vision chips

Analog circuits based on resistive networks emulate the behavior of the vertebrate eye, detecting edges, differentiating between surfaces, and estimating motion. The speed and simplicity of these devices make them candidates for applications ranging from security systems to retinal replacements.

Computing optical flow in the primate visual system

Computing motion on the basis of the time-varying image intensity is a difficult problem for both artificial and biological vision systems. We show how gradient models, a well-known class of motion algorithms, can be implemented within the magnocellular pathway of the primates visual system. Our cooperative algorithm computes optical flow in two steps. In the first stage, assumed to be located in primary visual cortex, local motion is measured while spatial integration occurs in the second stage, assumed to be located in the middle temporal area (MT). The final optical flow is extracted in this second stage using population coding, such that the velocity is represented by the vector sum of neurons coding for motion in different directions. Our theory, relating the single-cell to the perceptual level, accounts for a number of psychophysical and electrophysiological observations and illusions.

Analytical charge collection and MTF model for photodiode-based CMOS imagers

An analytical charge collection model is derived to assess the impact of the photodiode size, doping profile and surface recombination velocity on the modulation transfer function (MTF) and the charge collection efficiency of CMOS imagers. The effects of the microlens and optical isolation are also quantitatively analyzed. The calculated MTF results agree well with measured data of fabricated imagers based on three different pixel designs.

Computing optical flow in resistive networks and in the primate visual system

It is shown how the well-known algorithm of B. Horn and B.C. Schunk (1981) for computing optical flow, based on minimizing a quadratic functional using a relaxation scheme, maps onto two different kinds of massive parallel hardware: either resistive networks which are attractive for their technological potential, or neuronal networks related to the ones occurring in the motion pathway in the primates visual system. If the x and y components of the motion field are coded explicitly as voltages within electrical circuits, simple resistive networks solve for the optical flow in the presence of motion discontinuities. These networks are being implemented into analog, subthreshold CMOS VLSI (complementary metal oxide semiconductor very large-scale integration) circuits. If velocity is represented within a population of direction selective cells, the resulting neuronal network maps onto the primates striate and extrastriate visual cortex (middle temporal area). The performance of the network mimicks a large number of psychological illusions as well as electrophysical findings.<<ETX>>

Figure-ground segregation using an analog VLSI chip

An analog, parallel, computational system, built on a single, power-lean, CMOS VLSI chip, that labels all points inside a possibly incomplete and noisy contour in real time is described. The circuit performs figure-ground segregation of a scene, labeling all the points inside a designated figure by one voltage and all other parts outside this object using a different voltage value. Its behavior is shown to be robust, since small breaks in the contour are automatically sealed, providing for figure-ground segregation in a noisy environment. The two major limitations of the current figure-ground chip are its limited capability for recognizing figures with large gaps in the contour and the constraint that the figure always has to be centered.<<ETX>>

Discarding outliers using a nonlinear resistive network

The authors describe an algorithm for discarding outliers in noisy and possibly sparse sensor data. The authors demonstrate a network that incorporates robustness in its computation and the network settles to its final solution in a few time constants. The work is a modification of a resistive network which provides for detection and removal of outliers in image segmentation. A nonlinear resistive network is used to isolate an input point from the rest of the network when the input point differs significantly from the neighborhood average. The resistive network outlier algorithm has a simple elegant embodiment in analog real-time VLSI hardware. The authors demonstrate the algorithm with simulations on a laser radar image.<<ETX>>

Analog neural networks for focal-plane image processing

Autonomous systems have to overcome two major problems in interpreting the data collected by sensors. These problems are due to the fact that multiple real world scenes can produce a given intensity distribution and that sensor data is often corrupted by noise. These problems can be solved by imposing certain a priori knowledge about the world to arrive at a unique solution. This reduces early vision problems to constrained optimization problems, which can be conveniently formulated as energy minimization problems in the framework of Regularization Theory. These energy functions can be implemented in analog hardware. This feature makes this approach very attractive for real time autonomous systems. We are presently developing algorithms and analog CMOS chips based on this approach for focal plane image processing.

Analog image processing for IVHS applications

Single vehicle roadway departures (SVRD) are serious vehicular accidents that may be avoided through the use of advanced technology. In this paper we briefly describe our Vehicle Lateral Position Measurement System designed to alert the driver of possible SVRD situations. We then describe our testing of the system under a contract awarded by the National Highway Traffic Safety Administration to Rockwell International.