Bong-Soon Kang
Samsung
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Publication
Featured researches published by Bong-Soon Kang.
international conference on consumer electronics | 1995
Mal-seob Kwak; Bong-Soon Kang; Myung-Jun Choe; J. Gerard
This paper presents a high performance integrated video decoder which converts analog video signals to various video data, e.g., RGB, CCIR601, and square pixel video data, for more flexible multimedia video applications. Its performance has been proved after evaluation. A combing technique to reduce dot crawl noise caused by cross-luminance noise has been newly applied in the multimedia video interface area. Its effectiveness was proved by greatly reducing the noise effect on display monitors.
international conference on electronics circuits and systems | 1996
Min-Kyu Song; Geun-Soon Kang; Seongwon Kim; Euro Joe; Bong-Soon Kang
Energy Economized Pass-transistor Logic (EEPL) is proposed. Adopting the principle of regenerative positive feedback with pMOS switches, we reduce the power in comparison with CPL and SRPL. To demonstrate the performance of EEPL, a low power 7-bit serial counter is designed. The operating speed is about 250 MHz with 0.6 /spl mu/m 3.3 V CMOS process.
international symposium on consumer electronics | 1997
Bong-Soon Kang; Jun Sunwoo; Byung-Hwan Chun; J. Gerard
This paper presents the design of an integrated video decoder using image down scaler and adaptive comb filter. It accepts multistandard video signals from various video sources and produces digitized video data based on CCIR recommendations. The image down scaler reduces the size of the original image based on the scaling ratio. The adaptive comb filter removes dot crawl noise and hanging dot noise. Thereby, it provides improved performance of the decoder. The decoder was fabricated by using the 0.65 /spl mu/m CMOS process.
international symposium on consumer electronics | 1997
Sung-il Cho; Kyoung-Hwan Kim; Bong-Soon Kang
This paper describes the design of a robust on-screen-display (OSD) chip with improved automatic frequency control (AFC). The built-in AFC reduces the amount of sync jitter caused by the VCR head switching pulse, video copy guard signals, etc. This chip contains the OSD circuitry which can display characters of up to 12 rows by 30 columns on display systems. The character colors can be changed by programming the content of an 8-bit control register through the serial interface. It also provides the functions of half tone, box drawing, scroll, and blink. The chip was fabricated by using a 0.65 /spl mu/m double metal CMOS process.
international symposium on circuits and systems | 1996
Min-Kyu Song; Geun-Soon Kang; Bong-Soon Kang
A geometric-mean generator (A=/spl radic/(B/spl middot/C)) based on switched-current technique is proposed. A principle of superposition and cancellation is applied to the circuit. From the simulation results of the prototype circuit, it has an error within 5% in comparison with the mathematical calculation. The result shows the possibility of adapting the circuit to many types of analog processors.
Archive | 1997
Mal-seob Kwak; Jun Sunwoo; In-jun Hwang; Bong-Soon Kang
Archive | 2002
Young-sun Kim; Bong-Hwan Cho; Bong-Soon Kang; Dooil Hong
european solid state circuits conference | 1996
Min-Kyu Song; Geunsoon Rang; Seongwon Kim; Bong-Soon Kang
Archive | 2002
Hyung-Jin Choi; Bong-Soon Kang
Archive | 2002
Geun-Sik Jang; Bong-Soon Kang