Brian C. Leslie

New laser scanning techniques for wafer inspection

A laser scanning system designed for inspection of patterned wafers is described. This system addresses the inspection needs for 64 Mb (0.35 micrometers ) and 256 Mb (0.25 micrometers ) DRAM process technologies. The system is capable of detecting contaminant particles and planar pattern defects on memory and logic devices. The throughput of the system is designed for 30 wafers (200 mm in diameter) per hour. The beam at 488 nm is brought to a focal spot and is scanned on the wafer surface using an acousto-optic deflector (AOD). The entire wafer is scanned under oblique illumination in narrow strips in a serpentine fashion. The specular beam is collected and processed in, what we have named, the autoposition sensor (APS) to servo- lock the height position of the wafer during the scan. The system utilizes multiple independent collection channels positioned around the scan line and it is possible to select the polarization of the collected light for enhanced signal-to-background ratio. The engineering tradeoffs for realizing a system with high throughput and sensitivity are formulated and discussed. Calculations ilustrating scattering from submicron size particles under various polarization conditions are shown. These results lead to optimum design for collection optics. The APS channel is described and illustrated by results indicating that it is possible to keep the surface height of the wafer constant to within 0.4 micrometers in the presence of large changes in topography and wafer reflectivity. Results obtained from a range of production wafers demonstrating detection of 0.1 micrometers anomalies on bare wafer, 0.3 micrometers on memory devices, and 0.4 micrometers on random logic structures are presented.

In-situ height correction for laser scanning of semiconductor wafers

An in situ technique for servo control of surface height during laser scanning of semiconductor wafers is described. The scheme corrects any macroscopic height changes due to tilt and bow in the wafer and rejects local and pattern-dependent changes of height and reflectivity. The waist of the scanning beam is imaged on a slit aperture placed in front of a position-sensitive photodiode, leading to an ac signal at the scanning frequency. This ac signal then undergoes synchronous detection using a reference signal at the scanning frequency. This detection scheme leads to a reduced sensitivity to low-frequency electronic and thermal drifts. Normalization circuitry provides means for excluding the effects of reflectivity which can vary over four orders of magnitude on patterned wafers. The height signal, so obtained, is used to drive a PZT stage to a nominal height position in closed loop. On patterned wafers, an rms height accuracy of better than 0.1 μm has been achieved in 20-Hz bandwidth.