Brian Roggeman

On the Assessment of the Life of SnAgCu Solder Joints in Cycling With Varying Amplitudes

The long-term reliability of SnAgCu solder joints under actual field service conditions is far from well understood. Most accelerated cycling tests are restricted to constant amplitudes, whereas realistic environments usually involve varying amplitudes and/or more than one type of loading. Thus assessments of life as well as relative comparisons of alternatives in terms of life in service invariably have to rely on the assumption of a damage accumulation rule. This paper focuses on the life of SnAgCu solder joints in isothermal mechanical cycling with varying amplitudes. Test samples use representative solder material and geometry in electronic packaging industry. Experimental results show that the load sequence affects life significantly, reflecting deviations from a linear damage accumulation rule. Hardness and microstructure of solder material are studied after cyclic loading. The effect of load sequence could be explained by the damage evolution path and solder property change, which varied with cycling. Moreover, different levels of initial loading lead to changes in acceleration factors in subsequent shear fatigue cycling.

Effects of microstructure evolution on damage accumulation in lead-free solder joints

The wear out of lead-free solder joints under realistic loading conditions has been shown to deviate strongly from predictions based on current damage accumulation models. We argue that the deviation must be due to the simultaneous evolution of solder properties and damage. In general, solder properties and fatigue behaviors are determined by microstructure and damage accumulation mechanisms. Literature has reported on effects of precipitate coarsening and recrystallization of SnAgCu solders. However, we show these cannot account for critical trends in isothermal cycling such as repeated drops, bending and vibration. The present paper addresses an additional microstructure evolution path. Thermal aging and room temperature shear fatigue test on SnAgCu solder joints both demonstrated continuous hardness decrease. But precipitate coarsening was not observed in the shear fatigue test. Specially designed sample sectioning allowed the observation of slip bands formation and correlation with cyclic softening in shear fatigue test. In addition, the pattern of slip band formation was shown to be load-dependent, indicating the difference in damage accumulation. The consequences for the prediction of fatigue life under combined loading are discussed.

Effects of pre-stressing on solder joint failure by pad cratering

The present work addresses a significant risk generally overlooked in the design and accelerated testing of high reliability electronics. Manufacturers of servers and other expensive high reliability electronics equipment are becoming increasingly concerned with the risk of solder pad cratering. Their focus is, however, on cratering in testing, handling or transport, while the risk of premature wear-out due to thermal excursions (cycling) in service is completely ignored. This is a result of reliability testing that almost invariably addresses individual loading conditions separately. Under such conditions it is for example extremely rare for electrical failures in thermal cycling or high-cycle vibration testing to be associated with pad cratering. The present paper shows how manufacturers of high reliability equipment intended for mechanically protected or benign service conditions may be missing a significant risk of invisible damage induced in testing, handling or transport which may change the failure mode in service. We present first results of a systematic effort aimed at redefining currently proposed pad cratering test protocols.

First demonstration of drop-test reliability of ultra-thin glass BGA packages directly assembled on boards for smartphone applications

This paper reports the first demonstration of the drop-test reliability performance of large, ultra-thin glass BGA packages that are directly mounted onto the system board, unlike the current approach of flip-chip assembly of interposers, involving additional organic packages which are then SMT assembled onto boards. The packages, 18.4mm × 18.4mm in size made of 100μm-thick glass, were also successfully assembled, for the first time, in a SMT line. The effect on drop reliability of the glass BGAs with circumferential polymer collars was studied extensively. While the glass BGA packages met the reliability requirements, both with and without polymer collars, the polymer collars were found to further enhance the drop performance, as well as the fatigue life of solders. Finite element modeling was used to understand strain-relief mechanisms and provide design guidelines for reliability. The glass substrates fabrication process along with the formation of polymer collars by spin coating is detailed. The glass package-to-PCB assemblies were formed using SMT-compatible processes with standard equipment, followed by reliability testing through thermal cycling and drop tests. The compiled failure data from drop testing was fitted into a Weibull distribution plot. Comprehensive failure analysis was performed to assess the structural integrity of the glass substrates and identify the predominant failure mechanisms in drop test.

Effects of ‘Latent Damage’ on pad cratering: Reduction in life and a potential change in failure mode

Abstract The transition of electronics manufacturing to lead-free soldering has led to the emergence of pad cratering as an increasingly common failure mode. This first caused concern among manufacturers of servers and other high reliability products who started out with a focus on failure due to a single overload in testing, handling or transport. More recently, a growing number of manufacturers report early failures by cratering in thermal cycling, a phenomenon virtually unheard of for Tin–Lead (SnPb) soldered assemblies. We show how such changes of failure mode are likely to be results of latent damage induced by a preceding overload in assembly, in-circuit test or handling. Testing of three different laminates showed how latent damage can significantly reduce the pad cratering fatigue life in subsequent cycling. Notably, the relative reduction in life increases as cycling amplitudes are reduced, suggesting that consequences for life in service may be much greater than in accelerated testing. For purposes of illustration empirical extrapolation suggested that a 10% reduction in accelerated test life might well reflect a life in service reduced by more than a factor of 4!

Joint Level Test Methods for Solder Pad Cratering Investigations

The introduction of less compliant lead free solders together with weaker and more brittle laminate materials has led to major concerns with respect to the resistance of the latter to pad cratering. For purposes of laminate selection as well as for the quantification of acceptable handling and use conditions, there is a general interest in the testing for cratering at the joint level, rather than by testing entire assemblies. Joint level testing is cheaper, faster, and offers more quantitative results. Joint level testing also allows the elimination of confounding factors such as PCB and component stiffness. Developing test procedures and testing, it is important to distinguish between wear out under repeated loads and the failure due to a single overstress. Correlations between these two damage scenarios are largely fortuitous. Focusing on strength testing we have compared alternative methods and identified the most relevant approach. Occasions may arise where shear testing is the most appropriate, but most pad cratering scenarios are best represented by so-called Hot Bump Pull at an angle of about 30° to the pad normal. Replacing the solder balls by paste deposits or pulling in a direction normal to the pad may lead to a different ranking of materials and otherwise obscure systematic trends. We also recommend taking loading rate and temperature effects into account.

Duplicable and effective — A new drop test for BGA assemblies

Drop test performance is a key parameter for electronic packages such as ball-grid array (BGA) used for mobile and handheld applications. To get a repeatable and reliable test result, this paper introduced a modified method based on the currently widely used drop test method, JESD22B111. This method includes a totally symmetric layout so that all BGAs are at the same stress level and same failure probability during the drop. In order to get a consistent reliability result, the drop shock pulse was also clearly defined after analyzing all test results from different test labs with different drop testers. It was found that key parameters to define the failure are acceleration amplitude and velocity change or Delta-V. Delta-V represents energy dissipation during the drop cycle and plays a key role but is often neglected. This study has demonstrated that delta-V needs to be the same to get the same characteristic life of BGA solder joints for a given acceleration amplitude. Furthermore, the calculation of delta-V has been discussed which is critical for the shock pulse using profile other than half-sine shape.

Multi DOE Study on 28nm (RF) WLP Package to Investigate BLR Performance of Large WLP Die with 0.35mm Ball Pitch Array

Wafer Level Package (WLP) has become mainstream solution for handheld and mobile applications that require less Printed Circuit Board (PCB) footprint but comes with lots of functionality especially designed for high tier premium smartphones available in the market today. 28nm (RF) WLP is the bleeding edge of technology with regards to smallest transistor available in WLP packages that is in high volume production. The Board Level Reliability (BLR) at this high level of Si node integration is crucial to providing the package solution and needs to be characterized to make it possible to bring up a robust and reliable product to the consumer market. Test Vehicles to characterize and understand the effects of Temp Cycling conditions and Drop Shock conditions of a WLP package with 0.35 mm pitch solder ball and different die sizes have been characterized in recent publications [17,19 ].

Design and assembly process effects on lead free solder joint reliability of bare die and lidded flip chip ball grid array packages

Board level temperature cycle and drop test reliability data was collected for 23 × 23 mm FCBGA packages. Two different bare die thicknesses, the effect of lidded configuration, and two different board thicknesses were evaluated as key design factors. Different package warpage shapes modulated by two different assembly process flows, two different ball attach reflow profiles and ball attach rework were evaluated as key package process parameters. Two temperature cycle conditions were applied including JESD22-A104D Condition G and Condition N. Drop-shock test was also performed under JESD22-B104C Condition A and Condition B. The data suggested that bare die thickness and lidded configuration had significant impact on both temperature cycle and drop test reliability while the process parameters studied did not have a statistically significant effect. Composite substrate and board mechanical properties were characterized. Finite element analysis was conducted to interpret temperature cycle solder ball failure location considering both peeling stress and inelastic strain energy density.