Bum-seok Seo

Atomic-layer deposited IrO2 nanodots for charge-trap flash-memory devices

Charge-trap flash- (CTF) memory structures have been fabricated by employing IrO2 nanodots (NDs) grown by atomic-layer deposition. A band of isolated IrO2NDs of about 3 nm lying almost parallel to Si/SiO2 interface is confirmed by transmission electron microscopy and x-ray photoelectron spectroscopy. The memory device with IrO2NDs shows much larger capacitance–voltage (C–V) hysteresis and memory window compared with the control sample without IrO2NDs. After annealing at 800 °C for 20 min, the ND device shows almost no change in the width of C–V hysteresis and the ND distribution. These results indicate that the IrO2NDs embedded in SiO2 can be utilized as thermally stable, discrete charge traps, promising for metal oxide-ND-based CTF memory devices.

Fabrication of 3D trench PZT capacitors for 256Mbit FRAM device application

We fabricated trench PbZrxTi1-xO3 (PZT) capacitors that can be used in 256Mbit 1T-1C FRAM devices. The capacitor has 0.25mum diameter and 0.4mum depth. Three layers, Ir(20nm)/PZT(60nm)/Ir(20nm), were deposited in SiO2 trench holes by ALD and MOCVD. Both columnar and granular grains were formed on the sidewalls of the trench capacitors, and their relative portion had strong size dependence. The trench capacitors with more columnar PZT grains showed good switching behavior under 2.1V external bias and 19 to 24 muC/cm2 remnant polarization

Low temperature crystallization of high permittivity Ta oxide using an Nb oxide thin film for metal/insulator/metal capacitors in dynamic random access memory applications

(Ta1−xNbx)2O5 as the dielectric for metal/insulator/metal capacitors with Ru electrodes were investigated. Deposition was performed by ALD using tantalum ethoxide, niobium ethoxide, and ozone as source materials. The high-κ dielectric layer was synthesized from a binary layer (Ta2O5∕Nb2O5) with self-diffusion of the seed layer, Nb2O5. The seed layer becomes effective at a thickness of over 60 A. The dielectric deposited with 60 A Nb2O5 crystallized at 575 °C, the lowest processing temperature required to achieve good step-coverage (86%) for future generation dynamic random access memory. A capacitance density of about 23.0fF∕μm2 was observed for seed layers of 20 and 35 A. Capacitors with a Nb2O5 seed layer of 60 A achieved a capacitance density as high as 44.2fF∕μm2. The reason for this disparity is that the thicker insulator crystallizes at a post-annealing temperature of 575 °C. The leakage current measured at 1 V was moderately low, near 1×10−7A∕cm2.

CHARACTERIZATION OF NOVEL ELECTRODE FOR HIGH-DENSITY Pb(Zr, Ti)O3 CAPACITOR APPLICATION

ABSTRACT For high-density FRAM application, we found novel electrodes of IrTi family having a sufficiently low resistance. In addition, IrTi show good adhesion and better surface roughness than Ir. From FWHM results, PZT crystallinity is improved by applying IrTi. IrTi enhanced PZT capacitor properties of Fatigue and Retention. In 60 nm PZT, IrTi and IrTiOx/IrTi bottom electrode were effected increasing remnant polarization of 37 uC/cm2 and 47 uC/cm2 at 1.8 V. We successfully adopted IrTi family bottom electrode for making ultra thin PZT:40 nm PZT have good electric results such as [2Pr = 37 μ C/cm2, at 2 V]. Results of 40 nm PZT using IrTiOx/IrTi electrode is possibly given a challengeable clue for high-density FRAM.