Burak Kelleci

Impacts of Narrowband Interference on OFDM-UWB Receivers: Analysis and Mitigation

Orthogonal frequency-division multiplexing (OFDM)-based ultra-wide-band (UWB) transceivers hold the promise to revolutionize the next generation of short-range wireless networks and to be adopted in electronics products for both civil and military applications. For the UWB transceivers to coexist with nearby devices, it is necessary to design efficient UWB receivers whose operation is robust to narrowband interferences (NBI). This paper conducts an in-depth analysis to establish the impacts of NBI on the performance of an OFDM-UWB receiver. A comprehensive study to assess the effects of NBI on the quantization noise in the analog-to-digital converter (ADC), timing, and carrier acquisition is presented. The analytical results show that the efficiency of the ADC is degraded by NBI, although this problem could be slightly remedied by an adaptive autogain controller (AGC). It is also found that, compared with the conventional autocorrelation-based acquisition scheme, the pseudonoise (PN) sequence matched-filtering-based acquisition scheme presents higher robustness to NBI. Nevertheless, both these two acquisition schemes fail at high interference levels. As a conclusion, it is critical to develop novel and low-complexity NBI mitigation schemes for OFDM-UWB receivers that take into account the impacts introduced by NBI

Digital Approaches to ISI-Mitigation in High-Resolution Oversampled Multi-Level D/A Converters

A new digital signal processing approach to shaping intersymbol interference (ISI) and static mismatch errors simultaneously in oversampled multi-level digital to analog converters (DAC) has recently been proposed. In this paper, a mathematical framework is established for analyzing ISI errors as well as comparing the ISI sensitivities of different mismatch shaping algorithms. The framework is used to analyze the fundamental problems of popularly used algorithms such as data-weighted-averaging (DWA) in the presence of nonlinear ISI: Large-signal even-order distortion and frequency modulated harmonics at low signal levels. The new ISI-shaping algorithm results in significant improvement over previous schemes including the modified Mismatch Shaper (MMS) which also addresses ISI error. The new ISI shaper, while increasing the digital complexity, practically eliminates the need for conventional ISI mitigation techniques such as time consuming, layout-critical, non-automated and process specific analog design methods. The advantages of ISI shaping is further verified on an experimental audio DAC with simple non-return-to-zero (NRZ) current steering segments implemented in a 45 nm CMOS process and running off a single-phase clock of only 3.072 MHz.

An Analog Approach to Suppressing In-Band Narrow-Band Interference in UWB Receivers

Due to the huge bandwidth of ultra-wide-band (UWB) systems, in-band narrow-band interference (NBI) may hinder receiver performance. Sources of potential NBI that lie within the IEEE 802.15.3a UWB bandwidth are presented. To combat interference in multi-band orthogonal frequency-division multiplexing (MB-OFDM) UWB systems, an analog notch filter is designed to be included in the UWB receive chain. The filters architecture is based on feedforward subtraction of the interference, and includes a least-mean-square (LMS) tuning scheme to match amplitudes of the two paths. An 8-bit discrete control is used to adjust the filters center frequency across the UWB baseband. It was fabricated in TSMCs 0.18-mum process, and experimental results are provided

Narrowband Interference Suppression in Multi-Band OFDM Ultra Wideband Communication Systems: A Mixed-Mode Approach

To avoid significant losses that might be induced by a narrowband interference (NBI) on the performance of a multi-band (MB) OFDM ultra wideband (UWB) receiver, efficient NBI mitigation schemes are required. This paper proposes a novel mixed-mode NBI suppression scheme that relies on the cooperation between a digital NBI detector and an adaptive analog notch filter. Simulation results show that the proposed mixed-mode suppression scheme improves the performance of the digital frequency excision scheme in a MB-OFDM UWB receiver by as much as an equivalent signal-to-interference ratio gain of 9 dB

THD+Noise Estimation in Class-D Amplifiers

A mathematical analysis of the effect of jitter and nonlinear inductance on THD+noise of class-D amplifiers is presented. In the analysis, it is assumed that jitter is not correlated between edges and has Gaussian distribution. It is shown that the nonlinear inductor in the output filter causes THD+noise to be frequency dependent. The relationship between jitter, nonlinear inductor and circuit parameters is formulated. The accuracy of the proposed mathematical approximation is verified by transistor level simulations.

Low-Voltage Temperature-Independent Current Reference with no External Components

A low-voltage CMOS temperature-independent current reference is presented. The proposed circuit requires no external component for biasing. Temperature independent voltage is converted to current, and proper operation is guaranteed by a fast startup circuit. The reference current is designed scalable to allow changing the power consumption of the overall system dynamically. The circuit is fabricated in TSMC 0.18mum process and measurement results show less than plusmn100 nA variation between 22deg C and 100deg C.

Pre-power amplifier for 5.2-5.8 GHz band

The design of a low-voltage and broadband pre-power amplifier is presented. The purpose of the pre-power amplifier is to separate the external power amplifier and internal mixer to deliver the required input power to the power amplifier. The amplifier is designed in 0.35 /spl mu/m SiGe technology. Differential topology is used in order to reduce the effect of the bonding inductances. The amplifier is optimized for maximum output power and maximum yield. The simulation results of the amplifier show 2 dBm output power with 13 dB gain. The gain variation is less than 0.5 dB in-band. The output power is always more than 0 dBm after characterization.

A 108dB-DR 120dB-THD and 0.5V rms output audio DAC with inter-symbol-interference-shaping algorithm in 45nm CMOS

The current trend in high-performance audio DACs is to use fine-resolution quantization to reduce the out-of-band noise (OBN), reduce jitter sensitivity, and simplify analog filtering. Recent techniques achieve this goal by using a mix of DAC elements with different weights, e.g., segmenting [1] or cascading [2]. Unlike 1b modulation, the multi-level DACs need mismatch shaping algorithms to compensate for the typical 0.1 to 1% on-die mismatch. In addition to the element mismatch, dynamic error sources such as asymmetrical switching, clock skew, and parasitic memory are major hindrances to achieve distortion and dynamic range targets. The resulting dependence of present symbol error to the past symbol is referred to as inter-symbol-interference (ISI), and is a function of the switching activity of all the individual DAC elements. Unfortunately, the popular mismatch-shaping algorithms (e.g., rotation-DWA) are addressing only the static mismatch problem. They typically increase the switching activity thus amplify ISI errors. Furthermore, the error comes often in the form of spurious tones with signal-dependent frequency (FM modulation [3]) that ruins the low-amplitude performance (harmonics for a −60dB signal) which is critical for the perceived sound quality. A common remedy is to add a digital DC offset to shift the tones out of band. However, this merely moves the problematic amplitude region, and does not solve the problem. Moreover, ISI errors often limit the large signal THD as a result of a strong signal-dependent modulation of the element transition rate.

Recursive odd-even sorter for vector quantizer

A recursive, odd-even transposition sorter based vector quantizer which is used in mismatch shaping algorithms is presented. Although recursive parallel sorting algorithms require less area than fully parallel sorting algorithms, they are slower than fully parallel algorithms. A widely used recursive parallel sorting algorithm is the perfect shuffle which requires multiple clock cycles to shuffle and sort the data. The proposed recursive algorithm uses fewer clock cycles than the perfect shuffle to sort less than 80 inputs. An area efficient version is also proposed to sort less than 16 inputs faster than perfect shuffle algorithm. To compare the performance of various sorting algorithms suitable for vector quantizer, they are realized and synthesized in TSMC 40nm low-power technology. Speed and area results indicate that the proposed algorithm sorts 32 inputs at a 42% faster rate by using 14% fewer components than the perfect shuffle sorter and a 80% slower rate by using 27% fewer components than the Bitonic sorter. The area efficient version sorts 32 inputs at a 21% slower rate by using 32% fewer components than the perfect shuffle sorter.

Pulse Suppression Technique for Mitigating Digital Clock Noise

A practical digital clock noise mitigation technique based on pulse removal is presented. Clock frequency is increased to generate an excess pulse, which is removed in order to match the number of pulses in an average time frame. The location of the excess pulse is selected as the same time point or randomly selected in every time frame. Mathematical analyses are presented for both methods. The circuit is implemented using a state machine on a FPGA. Measurement results indicate more than 40 dB improvement on the digital noise level within a band of interest.