Byungcheul Kim
Gyeongnam National University of Science and Technology
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Featured researches published by Byungcheul Kim.
Applied Physics Letters | 2002
Byungcheul Kim; K. T. Sun; Kyoungwan Park; K. J. Im; T. Noh; M. Y. Sung; S.H. Kim; Sahn Nahm; Y. N. Choi; Seong-Sik Park
White-colored materials synthesized by a thermal annealing of milled GaN powders at 930 °C in a nitrogen atmosphere were identified to be monoclinic β-Ga2O3 nanowires by x-ray diffraction and scanning electron microscopy. High-resolution transmission electron microscopy revealed that these nanowires are single nanocrystals, and energy dispersive x-ray indicated that these nanomaterials are free of any metals. In addition, bundles of these crystalline nanowires in the rectangular-pole shape are a few centimeters in length.
spring congress on engineering and technology | 2012
Byungcheul Kim; Eui-Seok Jeon; Chan Kim
Methods for achieving high efficiency are studied for 15 W SMPS using flyback converter. Transformer in sandwich form is used to reduce leakage current. MOSFETs with low on-resistance are used to reduce energy loss. Schottky diode is used for output. Condenser with low internal equivalent series resistance is used as an output electrolytic condenser. This SMPS shows efficiency of 83.1% at 220 Vac input and 1.2A output current.
ieee international conference on properties and applications of dielectric materials | 1997
Sang-Bae Yi; Sam-Kyung Kuk; Sang-eun Lee; Byungcheul Kim; Kwang-Yell Seo
TSC (thermally stimulated current) technique has been applied to investigate the characteristics of MONOS (metal-oxide-nitride-oxide-semiconductor) structures with superthin nitride film of 46 /spl Aring/ thick for the low voltage NVSM. A new discharging model bans been developed and formulated for analysis of TSC curves due to memory traps such as the blocking oxide-nitride interface trap and the nitride bulk trap. By best fitting method, the blocking oxide-nitride interface traps are found to be energetically distributed in the range of 1.17/spl sim/1.18 eV below the top of the nitride conduction band with a density of N/sub ON/=2.3/spl times/10/sup 15/ cm/sup -2/ eV/sup -1/. The discharging mechanism can be explained that the holes trapped in the blocking oxide-nitride interface traps, distributed uniformly in energy, are first thermally excited into the nitride valence band, then drifted to the nitride-tunneling oxide interface, and finally tunneled into the Si valence band to contribute to TSC.
Journal of The Korean Institute of Electrical and Electronic Material Engineers | 2007
Joo-Yeon Kim; Moonkyung Kim; Byungcheul Kim; Jungwoo Kim; Kwang-Yell Seo
To implement tera bit level non-volatile memories of low power and fast operation, proving statistical reproductivity and satisfying reliabilities at the nano-scale are a key challenge. We fabricate the charge trapping nano scaled SONOS unit memories and 64 bit flash arrays and evaluate reliability and performance of them. In case of the dielectric stack thickness of 4.5 /9.3 /6.5 nm with the channel width and length of 34 nm and 31nm respectively, the device has about 3.5 V threshold voltage shift with write voltage of , 15 V and erase voltage of 10 ms, -15 V. And retention and endurance characteristics are above 10 years and cycle, respectively. The device with LDD(Lightly Doped Drain) process shows reduction of short channel effect and GIDL(Gate Induced Drain Leakage) current. Moreover we investigate three different types of flash memory arrays.
Transactions on Electrical and Electronic Materials | 2006
Ho-Myoung An; Kwang-Yell Seo; Joo-Yeon Kim; Byungcheul Kim
We report for the first time two-bit operational characteristics of a high-density NOR-type polysilicon-oxide-nitride-oxide-silicon (SONOS) array with common source line (CSL). An undesired disturbance, especially drain disturbance, in the NOR array with CSL comes from the two-bit-per-cell operation. To solve this problem, we propose an efficient bulk-biased programming technique. In this technique, a bulk bias is additionally applied to the substrate of memory cell for decreasing the electric field between nitride layer and drain region. The proposed programming technique shows free of drain disturbance characteristics. As a result, we have accomplished reliable two-bit SONOS array by employing the proposed programming technique.⡌ឫഀĀ᐀會Ā᐀㡆ﶖ⨀쁌ឫഀĀ᐀會Ā᐀遆ﶖ⨀郞ග瀀ꀏ會Āﶖ⨀〲岒Ā᐀會Ā᐀䁇ﶖ⨀젲岒Ā㰀會Ā㰀顇ﶖ⨀끩Ā㈀會Ā㈀ﶖ⨀䡪ഀĀ᐀會Ā᐀䡈ﶖ⨀Ā᐀會Ā᐀ꁈﶖ⨀硫ഀĀ저會Ā저ﶖ⨀샟ගĀ저會Ā저偉ﶖ⨀栰岒ഀĀ저會Ā저ꡉﶖ⨀1岒Ā저會Ā저Jﶖ⨀惝ගĀ會Ā塊ﶖ⨀ග䈀Ā切會Ā切끊ﶖ⨀⣟ගĀ搀會Ā搀ࡋﶖ⨀큭킢Ā저會Ā저恋ﶖ⨀桮킢Ā저會Ā저롋ﶖ⨀
Transactions on Electrical and Electronic Materials | 2016
Ho-Myoung An; Byungcheul Kim
Copyright ©2016 KIEEME. All rights reserved. This is an open-access article distributed under the terms of the Creative Commons Attribution Non-Commercial License (http://creativecommons.org/licenses/by-nc/3.0) which permits unrestricted noncommercial use, distribution, and reproduction in any medium, provided the original work is properly cited. pISSN: 1229-7607 eISSN: 2092-7592 DOI: http://dx.doi.org/10.4313/TEEM.2016.17.1.25 OAK Central: http://central.oak.go.kr TRANSACTIONS ON ELECTRICAL AND ELECTRONIC MATERIALS Vol. 17, No. 1, pp. 25-28, February 25, 2016
Journal of The Korean Institute of Electrical and Electronic Material Engineers | 2013
Dong Won Lee; Byungcheul Kim
The rectified voltage supplied to LED lamp is used in load and then the surplus voltage can be produced in LED lighting. In this case, LED lighting is proposed that can recyclable the excess voltage to supply power to the controller.
Journal of The Korean Institute of Electrical and Electronic Material Engineers | 2012
Byungcheul Kim; Chang Soo Kang; Hyun-Yong Lee; Joo-Yeon Kim
In this study, a substrate-bias assisted 2-step pulse programming method is proposed for realizing 4-bit/1-cell operation of the SONOS memory. The programming voltage and time are considerably reduced by this programming method than a gate-bias assisted 2-step pulse programming method and CHEI method. It is confirmed that the difference of 4-states in the threshold voltage is maintained to more than 0.5 V at least for 10-year for the multi-level characteristics.
Journal of The Korean Institute of Electrical and Electronic Material Engineers | 2011
Jae-Ho Shin; Byungcheul Kim; Jong-Bin Yeo; Hyun-Yong Lee
In this study, thin film amorphous-to-crystalline phase-change rate was evaluated in using a nano-pulse scanner. The focused laser beam with a diameter was illuminated in the power (P) and pulse duration (t) ranges of 1-31 mW and 10-460 ns, respectively, with subsequent detection of the responsive signals reflected from the film surface. We also evaluated the material characteristics, such as optical absorption and energy gap, crystalline phases, and sheet resistance of as-deposited and annealed films. The result of experiments showed that the thermal stability of the Ge-Se-Te film is largely improved by adding Se.
Journal of The Korean Institute of Electrical and Electronic Material Engineers | 2011
Jae-Ho Shin; Seung-Cheol Baek; Byungcheul Kim; Hyun-Yong Lee
An amorphous thin film is one of the most commonly used materials for phase-change data storage. In this study, thin film amorphous-to-crystalline phase-change rate were evaluated in using 658 nm laser beam. The focused laser beam with a diameter was illuminated in the power (P) and pulse duration (t) ranges of 1-17 mW and 10-460 ns, respectively, with subsequent detection of the responsive signals reflected from the film surface. We also evaluated the material characteristics, such as optical absorption and energy gap, crystalline phases, and sheet resistance of as-deposited and annealed films. The result of experiments showed that the thermal stability of the film is largely improved by adding Au.