C.A. De La Cruz-Blas

1.5-V MOS translinear loops with improved dynamic range and their applications to current-mode signal processing

Novel MOS translinear loop topologies for very low-voltage applications are presented. The inclusion of dc level shifting, together with a novel biasing scheme based on two MOS transistors in the triode region, allows the operation of the loops at supply voltages as low as V/sub GS/+2V/sub DSsat/ maintaining at the same time a large dynamic range. Several current-mode translinear circuits, both static and dynamic, i.e., geometric mean, squarer/divider, multiplier and square-root-domain filters, are implemented following this approach, demonstrating on silicon the proposed techniques.

1.5-V square-root domain second-order filter with on-chip tuning

A novel square-root domain (SRD) second order filter with automatic tuning control is described. The tuning system is based on a master-slave configuration, where the master is a SRD current-mode magnitude locked loop. The control circuitry allows tuning of the cut-off frequency as well as the quality factor and gain of the filter. The basic building blocks of the complete system are implemented employing a design strategy based on the inherent nonlinear characteristic of Class-AB linear transconductors. A proper biasing scheme in such transconductors leads to operation with very low supply voltages (as low as V/sub GS/+2V/sub DSsat/). Simulation and numerical results together with measurements from a fabricated prototype in a 0.8-/spl mu/m CMOS technology are included in order to validate the design technique proposed.

1.5-V current-mode CMOS true RMS-DC converter based on class-AB transconductors

A current-mode CMOS RMS-DC converter is presented. The basic building blocks are based on a novel approach to design current-mode computational cells. In such an approach, the large-signal V-I characteristic of class-AB transconductors is conveniently exploited leading to a very regular and compact implementation. A proper biasing scheme in such transconductors allows operation with supply voltage as low as V/sub GS/+2V/sub DSsat/. Measurement results from a practical prototype are presented in order to demonstrate the technique proposed here.

A novel low-voltage low-power class-AB linear transconductor

This paper presents a new compact low-voltage differential linear transconductor. The proposed transconductor is based on a straightforward modification of a classical scheme that leads to class-AB linear operation. The transconductor has been designed using a 0.8 /spl mu/m CMOS technology (VT /spl sim/ 0.8 V) and it is operated at 1.5 V with only 42 /spl mu/W of quiescent power consumption and 40 MHz bandwidth. This transconductor can find applications in low power gm-C filters.

A

In this brief, a novel class-AB implementation of a current-mode exponential variable gain amplifier (VGA) is presented. The VGA is based on a novel current amplifier circuit implemented by multicoupled MOS translinear loops operating in strong inversion and saturation. The gain is conveniently configured for performing a pseudo-exponential approximation leading to a very compact design since an extra multiplier is not needed. Moreover the VGA can operate with very low voltage and power efficiency. Measurement results from a fabricated prototype in a 0.5-mum n-well CMOS technology reveal gain control up to 12 dB with errors less than plusmn0.5 dB and power consumption of 375 muW for a supply voltage of plusmn0.75 V.

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A novel technique to implement an exponential pre-distortion circuit based on a piecewise-linear (PWL) construction method is presented. The technique is based on a maximum operator together with rectified affine functions. The proposed circuit is implemented with current mirrors and a Winner-Take-All circuit, thus achieving a technology-independent exponential circuit with no range limit, ideally. The proposed technique avoids the propagation and accumulation of the linear segment errors, which affect the exponential approximation only locally. To demonstrate the technique, a prototype was fabricated in 0.13 μm CMOS technology and measurement results were obtained revealing a linear-in-decibel range around 41 dB with an error of ±1 dB and 535 μW power consumption.

0.75-V Compact CMOS Class-AB Current-Mode Exponential Variable Gain Amplifier

In this paper, a novel low-voltage low-power implementation of an exponential voltage-to-voltage converter (EVVC) is presented. It is based on a pseudo-exponential approximation whose terms are easily achieved by the nonlinear currents of a class-AB transconductor. The circuit is able to operate correctly for supply voltages as low as VGS + 2VDSsat. Simulation results in a 0.5mum CMOS technology show a 47 dB output voltage range with linearity error less than plusmn0.5dB at plusmn1.5 V supply voltage. The power dissipation is less than 100muW

PWL Current-Mode CMOS Exponential Circuit Based on Maximum Operator

A 1.5-V square-root domain (SRD) first-order filter possessing multiple operating points is presented. The basic building blocks of the filter are based on MOS translinear loops and dynamic level shifter techniques, allowing low voltage operation and an extended dynamic range. However the dynamic level shifters introduce positive feedback inducing three operating points to the filter through a negative differential resistance. A detailed analysis of such performance employing a bi-port analysis is offered. Simulation and measurement results are provided in order to demonstrate the analysis and circuits proposed