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Dive into the research topics where R.G. Carvajal is active.

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Featured researches published by R.G. Carvajal.


IEEE Journal of Solid-state Circuits | 2004

Very low-voltage analog signal processing based on quasi-floating gate transistors

J. Ramirez-Angulo; Antonio J. López-Martín; R.G. Carvajal; Fernando Muñoz Chavero

A novel design principle for very low-voltage analog signal processing in CMOS technologies is presented. It is based on the use of quasi-floating gate (QFG) MOS transistors. Similar to multiple input floating gate (MIFG) MOS transistors, a weighted averaging of the inputs accurately controlled by capacitance ratios can be obtained, which is the basic operating principle. Nevertheless, issues often encountered in MIFG structures, such as the initial charge trapped in the floating gates or the gain-bandwidth product degradation, are not present in QFG configurations. Several CMOS circuit realizations using open- and closed-loop topologies, have been designed. They include analog switches, mixers, programmable-gain amplifiers, track and hold circuits, and digital-to-analog converters. All these circuits have been experimentally verified, confirming the usefulness of the proposed technique for very low-voltage applications.


IEEE Journal of Solid-state Circuits | 2005

Low-Voltage Super class AB CMOS OTA cells with very high slew rate and power efficiency

Antonio J. López-Martín; S. Baswa; J. Ramirez-Angulo; R.G. Carvajal

A simple technique to achieve low-voltage power-efficient class AB operational transconductance amplifiers (OTAs) is presented. It is based on the combination of class AB differential input stages and local common-mode feedback (LCMFB) which provides additional dynamic current boosting, increased gain-bandwidth product (GBW), and near-optimal current efficiency. LCMFB is applied to various class AB differential input stages, leading to different class AB OTA topologies. Three OTA realizations based on this technique have been fabricated in a 0.5-/spl mu/m CMOS technology. For an 80-pF load they show enhancement factors of slew rate and GBW of up to 280 and 3.6, respectively, compared to a conventional class A OTA with the same 10-/spl mu/A quiescent currents and /spl plusmn/1-V supply voltages. In addition, the overhead in terms of common-mode input range, output swing, silicon area, noise, and static power consumption, is minimal.


IEEE Transactions on Circuits and Systems Ii-express Briefs | 2006

A free but efficient low-voltage class-AB two-stage operational amplifier

J. Ramirez-Angulo; R.G. Carvajal; J. Galan; Antonio J. López-Martín

A simple and efficient low-voltage two-stage operational amplifier with Class-AB output stage is introduced. It has a large effective output current boosting factor (/spl sim/50) and close to a factor 2 bandwidth enhancement. This is achieved at the expense of minimum increase in circuit complexity and no additional static power dissipation. Experimental verification of the characteristics of the proposed circuit is provided.


IEEE Transactions on Circuits and Systems Ii-express Briefs | 2004

Low supply voltage high-performance CMOS current mirror with low input and output voltage requirements

J. Ramirez-Angulo; R.G. Carvajal; A. Torralba

This paper presents a scheme for the efficient implementation of a low supply voltage continuous-time high-performance CMOS current mirror with low input and output voltage requirements. This circuit combines a shunt input feedback and a regulated cascode output stage to achieve low input resistance and very high output resistance. It can be used as a high-precision current mirror in analog and mixed signal circuits with a power supply close to a transistors threshold voltage. The proposed current mirror has been simulated and a bandwidth of 40 MHz has been obtained. An experimental chip prototype has been sent for fabrication and has been experimentally verified, obtaining 0.15-V input-output voltage requirements, 100-/spl Omega/ input resistance, and more than 200-M/spl Omega/ (G/spl Omega/ ideally) output resistance with a 1.2-V supply in a standard CMOS technology.


IEEE Transactions on Circuits and Systems | 2005

A low-power low-voltage OTA-C sinusoidal oscillator with a large tuning range

J. Galan; R.G. Carvajal; A. Torralba; F. Munoz; J. Ramirez-Angulo

A new operational transconductance amplifier and capacitor based sinusoidal voltage controlled oscillator is presented. The transconductor uses two cross-coupled class-AB pseudo-differential pairs biased by a flipped voltage follower, and it exhibits a wide transconductance range with low power consumption and high linearity. The oscillator has been fabricated in a standard 0.8-/spl mu/m CMOS process. Experimental results show a frequency tuning range from 1 to 25 MHz. The amplitude is controlled by the transconductor nonlinear characteristic. The circuit is operated at 2-V supply voltage with only 1.58 mW of maximum quiescent power consumption.


IEEE Transactions on Circuits and Systems | 2007

Super Class-AB OTAs With Adaptive Biasing and Dynamic Output Current Scaling

J. Galan; Antonio J. López-Martín; R.G. Carvajal; J. Ramirez-Angulo; Carlos Rubia-Marcos

A new family of single-stage super Class-AB operational transconductance amplifiers (OTAs) suitable for low-voltage operation and low power consumption is presented. Three novel topologies are proposed featuring simplicity and compactness. They are based on the combination of adaptive biasing techniques for the differential input stage and nonlinear current mirrors for the active load that provide additional dynamic current boosting. The OTAs have been fabricated in a standard 0.5-mum CMOS process. Experimental results show a greatly improved slew rate by factors 30-60 and gain-bandwidth product by factors 11.5-17 when compared to a classical Class-A OTA. The circuits are operated at plusmn1-V supply voltage with only 10 muA of bias current


IEEE Transactions on Circuits and Systems | 2009

Highly Linear Tunable CMOS

Lucia Acosta; M. Jimenez; R.G. Carvajal; Antonio J. López-Martín; J. Ramirez-Angulo

A comprehensive analysis of tunable transconductor topologies based on passive resistors is presented. Based on this analysis, a new CMOS transconductor is designed, which features high linearity, simplicity, and robustness against geometric and parametric mismatches. A novel tuning technique using just a MOS transistor in the triode region allows the adjustment of the transconductance in a wide range without affecting the voltage-to-current conversion core. Measurement results of the transconductor fabricated in a 0.5- mum CMOS technology confirm the high linearity predicted. As an application, a third-order Gm-C tunable low-pass filter fabricated in the same technology is presented. The measured third-order intermodulation distortion of the filter for a single 5-V supply and a 2-Vpp two-tone input signal centered at 10 MHz is -78 dB.


IEEE Transactions on Circuits and Systems I-regular Papers | 2000

Gm{\hbox{-}}C

J. Ramirez-Angulo; A. Torralba; R.G. Carvajal; J. Tombs

A scheme to achieve low-voltage wide-bandwidth operation of CMOS op amps with rail-to-rail input and output swing and constant gm is presented. It is based on a novel concept that uses a floating voltage controlled voltage source in the feedback path of the op amp in order to keep its input terminals close to one of the supply rails. Postlayout simulations on a 1.2 V rail-to-rail op amp with 13 MHz GB are presented which verify the proposed scheme.


IEEE Journal of Solid-state Circuits | 2005

Low-Pass Filter

Antonio J. López-Martín; J. Ramirez-Angulo; Chandrika Durbha; R.G. Carvajal

A versatile CMOS transconductor is proposed. Voltage-to-current conversion employs a polysilicon resistor and features high linearity over a wide input range and high current efficiency. Programmable balanced current mirrors able to operate in weak or moderate inversion regions provide wide transconductance gain tuning range without degrading other performance parameters like input range and linearity. The transconductor has two degrees of freedom for gain tuning. A 0.5-/spl mu/m implementation achieves a SFDR of 68 dB and a THD of -66.5dB using a dual supply of /spl plusmn/1.3 V with differential input swings equal to 77% of the total supply voltage, transconductance tuning over two decades, and 1.7 mW of static power consumption. Measurements demonstrate that operation in moderate inversion can lead to much less distortion levels than in strong inversion.


IEEE Transactions on Circuits and Systems | 2005

Low-voltage CMOS operational amplifiers with wide input-output swing based on a novel scheme

Meghraj Kachare; J. Ramirez-Angulo; R.G. Carvajal; Antonio J. López-Martín

A versatile low-voltage CMOS circuit with a triangular/trapezoidal transconductance characteristic and independently programmable slope (keeping constant height or constant width), height (keeping constant slope or constant width), and horizontal position is presented. Simulation results using Cadence DFW-II that verify the functionality of the circuit with /spl plusmn/1.5-V supplies are presented. A chip prototype has been fabricated in a 0.5-/spl mu/m technology and experimentally verified. The circuit can find application in the implementation of high resolution, high speed folding analog-to-digital converters, in piecewise-linear approximation, and in the implementation of membership functions in analog and mixed-signal neuro-fuzzy systems.

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J. Ramirez-Angulo

New Mexico State University

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J. Galan

University of Huelva

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F. Munoz

University of Seville

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J. Tombs

University of Seville

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