Antonio J. López-Martín

Very low-voltage analog signal processing based on quasi-floating gate transistors

A novel design principle for very low-voltage analog signal processing in CMOS technologies is presented. It is based on the use of quasi-floating gate (QFG) MOS transistors. Similar to multiple input floating gate (MIFG) MOS transistors, a weighted averaging of the inputs accurately controlled by capacitance ratios can be obtained, which is the basic operating principle. Nevertheless, issues often encountered in MIFG structures, such as the initial charge trapped in the floating gates or the gain-bandwidth product degradation, are not present in QFG configurations. Several CMOS circuit realizations using open- and closed-loop topologies, have been designed. They include analog switches, mixers, programmable-gain amplifiers, track and hold circuits, and digital-to-analog converters. All these circuits have been experimentally verified, confirming the usefulness of the proposed technique for very low-voltage applications.

Low-Voltage Super class AB CMOS OTA cells with very high slew rate and power efficiency

A simple technique to achieve low-voltage power-efficient class AB operational transconductance amplifiers (OTAs) is presented. It is based on the combination of class AB differential input stages and local common-mode feedback (LCMFB) which provides additional dynamic current boosting, increased gain-bandwidth product (GBW), and near-optimal current efficiency. LCMFB is applied to various class AB differential input stages, leading to different class AB OTA topologies. Three OTA realizations based on this technique have been fabricated in a 0.5-/spl mu/m CMOS technology. For an 80-pF load they show enhancement factors of slew rate and GBW of up to 280 and 3.6, respectively, compared to a conventional class A OTA with the same 10-/spl mu/A quiescent currents and /spl plusmn/1-V supply voltages. In addition, the overhead in terms of common-mode input range, output swing, silicon area, noise, and static power consumption, is minimal.

A free but efficient low-voltage class-AB two-stage operational amplifier

A simple and efficient low-voltage two-stage operational amplifier with Class-AB output stage is introduced. It has a large effective output current boosting factor (/spl sim/50) and close to a factor 2 bandwidth enhancement. This is achieved at the expense of minimum increase in circuit complexity and no additional static power dissipation. Experimental verification of the characteristics of the proposed circuit is provided.

Current-Mode Multiplier/Divider Circuits Based on the MOS Translinear Principle

In this paper, novel current-mode analog multiplier/divider circuits based on a pair of voltage-translinear loops are presented, featuring simplicity, precision and wide dynamic range. They are suitable for standard CMOS fabrication and can be successfully employed in a wide range of analog signal processing applications. Two versions, based on stacked and up-down voltage-translinear loops, respectively, are described. Experimental results are provided in order to verify their correct operation.

A new family of very low-voltage analog circuits based on quasi-floating-gate transistors

A new family of very low-voltage analog circuits is introduced. These circuits do not show the GB degradation that characterizes other low-voltage approaches based on floating-gate transistors. The proposed approach is validated with experimental results of a CMOS mixer in 0.5-/spl mu/m CMOS technology with 0.7-V input signal swing that operates on a single 0.8-V supply with transistor threshold voltages of 0.67 V.

Systematic Design of Companding Systems by Component Substitution

A design method for externally linear, internally nonlinear systems is presented which allows them to be derived from externally equivalent systems in a systematic way and with a minimum synthesis effort, just performing a simple component-to-component substitution. As a particular case, the synthesis of the most popular versions of voltage companding systems from externally equivalent Gm-C systems is addressed. The practical design of companding systems based on the MOS square law (Square-Root Domain systems) is fully illustrated along the complete design flow, from the Gm-C prototype to silicon. These systems, feasible in CMOS technologies and formerly difficult to obtain due to the inherent complexity of existing synthesis methods, particularly benefit from the simplicity of the proposed approach. Experimental results for two versions of tunable Square-Root Domain biquadratic filters and oscillators thus obtained and fabricated in a 2.4-μm CMOS process are presented, featuring favorable tunability and low THD.

Super Class-AB OTAs With Adaptive Biasing and Dynamic Output Current Scaling

A new family of single-stage super Class-AB operational transconductance amplifiers (OTAs) suitable for low-voltage operation and low power consumption is presented. Three novel topologies are proposed featuring simplicity and compactness. They are based on the combination of adaptive biasing techniques for the differential input stage and nonlinear current mirrors for the active load that provide additional dynamic current boosting. The OTAs have been fabricated in a standard 0.5-mum CMOS process. Experimental results show a greatly improved slew rate by factors 30-60 and gain-bandwidth product by factors 11.5-17 when compared to a classical Class-A OTA. The circuits are operated at plusmn1-V supply voltage with only 10 muA of bias current

Highly Linear Tunable CMOS

A comprehensive analysis of tunable transconductor topologies based on passive resistors is presented. Based on this analysis, a new CMOS transconductor is designed, which features high linearity, simplicity, and robustness against geometric and parametric mismatches. A novel tuning technique using just a MOS transistor in the triode region allows the adjustment of the transconductance in a wide range without affecting the voltage-to-current conversion core. Measurement results of the transconductor fabricated in a 0.5- mum CMOS technology confirm the high linearity predicted. As an application, a third-order Gm-C tunable low-pass filter fabricated in the same technology is presented. The measured third-order intermodulation distortion of the filter for a single 5-V supply and a 2-Vpp two-tone input signal centered at 10 MHz is -78 dB.

Gm{\hbox{-}}C

A versatile CMOS transconductor is proposed. Voltage-to-current conversion employs a polysilicon resistor and features high linearity over a wide input range and high current efficiency. Programmable balanced current mirrors able to operate in weak or moderate inversion regions provide wide transconductance gain tuning range without degrading other performance parameters like input range and linearity. The transconductor has two degrees of freedom for gain tuning. A 0.5-/spl mu/m implementation achieves a SFDR of 68 dB and a THD of -66.5dB using a dual supply of /spl plusmn/1.3 V with differential input swings equal to 77% of the total supply voltage, transconductance tuning over two decades, and 1.7 mW of static power consumption. Measurements demonstrate that operation in moderate inversion can lead to much less distortion levels than in strong inversion.

Low-Pass Filter

A versatile low-voltage CMOS circuit with a triangular/trapezoidal transconductance characteristic and independently programmable slope (keeping constant height or constant width), height (keeping constant slope or constant width), and horizontal position is presented. Simulation results using Cadence DFW-II that verify the functionality of the circuit with /spl plusmn/1.5-V supplies are presented. A chip prototype has been fabricated in a 0.5-/spl mu/m technology and experimentally verified. The circuit can find application in the implementation of high resolution, high speed folding analog-to-digital converters, in piecewise-linear approximation, and in the implementation of membership functions in analog and mixed-signal neuro-fuzzy systems.