C. H. Wu

High Temperature Stable [Ir3Si-TaN]/HfLaON CMOS with Large Work-Function Difference

The authors report novel 1000degC-stable [Ir₃Si-TaN]/HfLaON CMOS for the first time, where the self-aligned and gate-first process are full compatible to current VLSI. Good Phi_m-eff of 5.08 and 4.24 eV, low V_t of -0.10 and 0.18 V, high mobility of 84 and 217 cm²/Vs at 1.6 nm EOT, and small 85degC BTI <20 mV (10 MV/cm for 1 hr) are measured

Lanthanide and Ir-based dual metal-gate/HfAlON CMOS with large work-function difference

Metallic diffusion through high-K HfO₂, caused by high temperature metal-nitride decomposition, was reduced by using robust HfAlON. Useful dual effective work-function (phi_m,eff) of 4.25 and 5.15 eV are obtained in TaTb_0.2N/HflON and Ir/HfAlON at 1.7 nm EOT. Good dual phi_m,eff of 4.15 and 4.9 eV are also obtained in Yb_xSi/HfAlON and Ir_xSi/HfAlON FUSI-gates by reduced metal diffusion at lower temperature

High work function Ir/sub x/Si gates on HfAlON p-MOSFETs

We have fabricated the fully silicided Ir/sub x/Si-gated p-MOSFETs on HfAlON gate dielectric with 1.7-nm equivalent oxide thickness. After 950/spl deg/C rapid thermal annealing, the fully Ir/sub x/Si/HfAlON device has high effective work function of 4.9 eV, high peak hole mobility of 80 cm/sup 2//V/spl middot/s, and the advantage of being process compatible to the current VLSI fabrication line.

Very Low V t [Ir-Hf]/HfLaO CMOS Using Novel Self-Aligned Low Temperature Shallow Junctions

We report very low V_t [Ir-Hf]/HfLaO CMOS using novel self-aligned low-temperature ultra shallow junctions with gate-first process compatible with current VLSI. At 1.2 nm EOT, good Phi_m-eff of 5.3 and 4.1 eV, low V_t of +0.05 and 0.03 V, high mobility of 90 and 243 cm²/Vs, and small 85degC BTI <32 mV (10 MV/cm, 1 hr) are measured for p- and n-MOS.

High-Temperature Stable HfLaON p-MOSFETs With High-Work-Function

We report a novel 1000 degC stable HfLaON p-MOSFET with Ir3 Si gate. Low leakage current of 1.8times10-5 A/cm2 at 1 V above flat-band voltage, good effective work function of 5.08 eV, and high mobility of 84 cm2/Vmiddots are simultaneously obtained at 1.6 nm equivalent oxide thickness. This gate-first p-MOSFET process with self-aligned ion implant and 1000 degC rapid thermal annealing is fully compatible to current very large scale integration fabrication lines

\hbox{Ir}_{3}\hbox{Si}

Through the use of elastic conductive adhesive (ECA) as the bonding agent and patterned laser lift-off technology, a flexible metal substrate technology for the fabrication of vertical structured GaN-based light-emitting diodes (flex-LEDs) was proposed and demonstrated. It showed that the flex-LEDs have negligible changes in dominant wavelength-current and light output intensity-current-voltage characteristics when subjected to an external bending stress, indicating that the ECA used in the present technology performed well as a buffer to external stresses. As compared with conventional sapphire substrate GaN-based LEDs, Flex-LEDs with a chip size of 600 x 600 mum2 showed an increase in light output intensity (power) about 216% (80%) at 120 mA with an essential decrease in forward voltage from 3.51 to 3.3 V.

Gate

The authors have fabricated low-temperature fully silicided YbSi/sub 2-x/-gated n-MOSFETs that used an HfAlON gate dielectric with a 1.7-nm EOT. After a 600 /spl deg/C rapid thermal annealing, these devices displayed an effective work function of 4.1 eV and a peak electron mobility of 180 cm/sup 2//V/spl middot/s. They have additional merit of a process compatible with current very large scale integration fabrication lines.

Use of Elastic Conductive Adhesive as the Bonding Agent for the Fabrication of Vertical Structure GaN-Based LEDs on Flexible Metal Substrate

A novel 1000 degC-stable IrxSi gate on HfSiON is shown for the first time with full process compatibility to current very-large-scale-integration fabrication lines and proper effective work function of 4.95 eV at 1.6-nm equivalent-oxide thickness. In addition, small threshold voltages and good hole mobilities are measured in IrxSi/HfSiON transistors. The 1000 degC thermal stability above pure metal (900 degC only) is due to the inserted 5-nm amorphous Si, which also gives less Fermi-level pinning by the accumulated metallic full silicidation at the interface

HfAlON n-MOSFETs incorporating low-work function gate using ytterbium silicide

The authors have developed a novel high-temperature stable HfSi x gate for high-kappa HfSiON gate dielectric. After a 1000 degC RTA, the HfSix/HfSiON devices showed an effective work function of 4.27 eV and a peak electron mobility of 216 cm2/Vmiddots at 1.6-nm equivalent oxide thickness, with additional merit of a process compatible with current very large scale integration fabrication lines

High-Temperature Stable

We report a high effective work function (Phim-eff) and a very low Vt Ir gate on HfLaO p-MOSFETs using novel self-aligned low-temperature shallow junctions. This gate-first process has shallow junctions of 9.6 or 20 nm that are formed by solid phase diffusion using SiO2-covered Ga or Ni/Ga. At 1.2-nm effective oxide thickness, good Phim-eff of 5.3 eV, low Vt of +0.05 V, high mobility of 90 cm2/V-s at -0.3 MV/cm, and small 85degC negative bias-temperature instability (NBTI) of 20 mV (10 MV/cm for 1 h) are measured for Ir/HfLaO p-MOSFETs.