N. C. Su
National Cheng Kung University
Network
Latest external collaboration on country level. Dive into details by clicking on the dots.
Publication
Featured researches published by N. C. Su.
IEEE Electron Device Letters | 2009
N. C. Su; Shui-Jinn Wang; Albert Chin
In this letter, we report a low-voltage-driven amorphous indium-gallium-zinc oxide thin-film transistor with a high-kappa-value HfLaO gate dielectric. Good characteristics were achieved including a low <i>VT</i> of 0.22 V, small subthreshold swing of 76 mV/dec, high mobility of 25 cm<sup>2</sup>/ Vmiddots, and large <i>I</i> <sub>on</sub>/<i>I</i> <sub>off</sub> ratio of 5 times 10<sup>7</sup>. These good performances are obtained at an operation voltage as low as 2 V. These characteristics are attractive for high-switching-speed and low-power applications.
IEEE Electron Device Letters | 2010
N. C. Su; Shui-Jinn Wang; Chin-Chuan Huang; Y. H. Chen; Hao-Yuan Huang; Chen-Kuo Chiang; Albert Chin
A flexible thin-film transistor (TFT) was made by integrating a high- HfLaO gate dielectric and an amorphous-InGaZnO (a-IGZO) active layer on a polyimide substrate. This flexible HfLaO/a-IGZO TFT exhibits a low threshold voltage of 0.1 V, a small subthreshold swing of 0.18 V/dec, a high maximum saturation mobility of 22.1 cm2/V s, and an acceptable on/off current ratio of 2 × 10-5. The low threshold voltage and small subthreshold swing allow the device to operate at 1.5 V for low-power applications, which should enable significant future progress in energy efficiency.
IEEE Electron Device Letters | 2010
N. C. Su; Shui-Jinn Wang; Albert Chin
We report an amorphous indium gallium zinc oxide (a-IGZO) thin-film transistor nonvolatile memory (NVM). This NVM shows a large 1.2-V extrapolated ten-year memory window, along with low 10-V/-12-V program/erase voltage, fast 1-ms/100-¿s speed, and good endurance. This was achieved using a charge-trap-engineered structure and high- ¿ layers.
international electron devices meeting | 2007
Chao-Ching Cheng; C. H. Wu; N. C. Su; Shui-Jinn Wang; S. P. McAlister; Albert Chin
We report very low V<sub>t</sub> [Ir-Hf]/HfLaO CMOS using novel self-aligned low-temperature ultra shallow junctions with gate-first process compatible with current VLSI. At 1.2 nm EOT, good Phi<sub>m-eff</sub> of 5.3 and 4.1 eV, low V<sub>t</sub> of +0.05 and 0.03 V, high mobility of 90 and 243 cm<sup>2</sup>/Vs, and small 85degC BTI <32 mV (10 MV/cm, 1 hr) are measured for p- and n-MOS.
Electrochemical and Solid State Letters | 2010
N. C. Su; Shui-Jinn Wang; Albert Chin
This study demonstrates the feasibility of producing a ZnO thin film transistor (TFT) using hafnium-lanthanum-oxide (HfLaO) as the gate dielectric. By integrating high-κ HfLaO with an amorphous ZnO channel, the resulting HfLaO/ZnO TFTs display a low threshold voltage (V T ) of 0.28 V, a small subthreshold swing (SS) of 0.26 V/dec, an acceptable mobility (μ sat ) of 3.5 cm 2 /V s, and a good I on/ I off ratio of I × 10 6 . The SS heavily depends on the HfLaO/ZnO interface charges, a property which is related to the degree of crystallization of ZnO. The low V T and the small SS allow device voltage operation below 2 V for low power application.
IEEE Transactions on Electron Devices | 2008
C. F. Cheng; C. H. Wu; N. C. Su; Shui-Jinn Wang; S. P. McAlister; Albert Chin
We report a high effective work function (Phim-eff) and a very low Vt Ir gate on HfLaO p-MOSFETs using novel self-aligned low-temperature shallow junctions. This gate-first process has shallow junctions of 9.6 or 20 nm that are formed by solid phase diffusion using SiO2-covered Ga or Ni/Ga. At 1.2-nm effective oxide thickness, good Phim-eff of 5.3 eV, low Vt of +0.05 V, high mobility of 90 cm2/V-s at -0.3 MV/cm, and small 85degC negative bias-temperature instability (NBTI) of 20 mV (10 MV/cm for 1 h) are measured for Ir/HfLaO p-MOSFETs.
device research conference | 2010
H. Y. Huang; Yen-Chieh Huang; J.S Su; N. C. Su; Chen-Kuo Chiang; Chien-Hung Wu; Shui-Jinn Wang
Thin-film transistors were fabricated using amorphous indium gallium zinc oxide (α-IGZO) as channels and high-к material HfSiO as gate dielectric by RF sputtering. The influence of high-к PDA temperature variation on device characteristics was investigated. The bottom-gate low voltage driven (≤ 2 V) TFTs operated in n-type enhancement mode with a field-effect mobility of 12.7cm<sup>2</sup>/V-s, on-off current ratio of 3×10<sup>5</sup>, threshold voltage of 0.005V, and subthreshold voltage swing of 0.11V/dec.
IEEE Electron Device Letters | 2007
Chao-Ching Cheng; C. H. Wu; N. C. Su; Shui-Jinn Wang; S. P. McAlister; Albert Chin
At a 1.2-nm equivalent oxide thickness, HfSi<sub>x</sub>/Hf<sub>0.7</sub>La<sub>0.3</sub>ON n-MOSFETs showed an effective work function of 4.33 eV, a low threshold voltage of 0.18 V, and a peak electron mobility of 215 cm<sup>2</sup>/(Vldrs). These self-aligned and gate-first HfSi<sub>x</sub>/Hf<sub>0.7</sub>La<sub>0.3</sub>ON n-MOSFETs were processed using standard ion implantation and 1000-degC rapid thermal annealing, making them fully compatible with current very large scale integration fabrication lines.
Japanese Journal of Applied Physics | 2010
N. C. Su; Shui-Jinn Wang; Chin-Chuan Huang; Y. H. Chen; Hao-Yuan Huang; Chen-Kuo Chiang; Chien-Hung Wu; Albert Chin
In this study, we demonstrate the role of a titanium hafnium oxide (TiHfO) gate dielectric in improving the overall electronic performance of a ZnO thin-film transistor (TFT). TixHf1-xO (x = 0.63) was fabricated by the rf co-sputtering technique. Using TiHfO as the gate dielectric, the device fabricated in this study exhibits a threshold voltage of 0.34 V, a subthreshold swing of 0.23 V/dec, a field-effect mobility of 2.1 cm2 V-1 s-1, and an ON/OFF current ratio of 105. The small subthreshold swing and low positive threshold voltage are attributed to the higher value of ? of 40 for the dielectric. This result enables device operation below 2 V, allowing its use in low-power driving circuits in display applications.
device research conference | 2008
N. C. Su; C. H. Wu; Meng-Fan Chang; J. Z. Huang; Shui-Jinn Wang; Wei‐I Lee; Po-Tsung Lee; Hsuan-Ling Kao; Albert Chin
Using excimer laser annealing and laser-reflective Al-covered gate, the self-aligned, gate-dielectric first and gate-electrode first Al/TaN/Ir/HfLaO p-MOSFET showed low threshold voltage (Vt) of -0.07 V and good peak hole mobility of 86 cm2/V-s at 1.5 nm equivalent-oxide thickness (EOT).