Changjoon Park

A New RF CMOS Gilbert Mixer With Improved Noise Figure and Linearity

The noise figure of an RF CMOS mixer is strongly affected by flicker noise. The noise figure can be improved using pMOS switch circuits, which insert current at the on/off crossing instants of the local oscillator switch stage because the circuits reduce the flicker noise injection. When it is applied to a conventional Gilbert mixer, the injection efficiency and linearity are degraded by the nonlinear parasitic capacitances of the pMOS switch circuits and the leakage through the parasitic path. We propose the pMOS switch circuits with an inductor, which tunes out the parasitic components at 2fo and closes out the leakage path. The mixer fabricated in 0.13-mum CMOS at 2.4-GHz center frequency has provided improved characteristics for linearity and noise figure.

A Sub-2 dB NF Dual-Band CMOS LNA for CDMA/WCDMA Applications

This letter presents the design and experimental results of a 1.8/2.14 GHz dual-band CMOS low-noise amplifier (LNA), which is usable for code division multiple access and wideband code division multiple access applications. To achieve the narrow-band gain and impedance matching at both bands, an extra capacitor in parallel with the Cgs of the main transistor and a harmonic tuned load are switched. Except for the output blocking capacitor and series inductor, all components are integrated on a single-chip. The LNA is designed using a 0.13mum- CMOS process and employs a supply voltage of 1.5 V and dissipates a dc power of 7.5 mW. The measured performances are gains of 14.54 dB and 16.6 dB, and noise figures of 1.75 dB and 1.97 dB at the two frequency bands, respectively. The linearity parameters of and P1dBin are -16dBm and -5.8 dBm at the 1.8 GHz, -14.8 dBm and -5.3 dBm at the 2.14 GHz, respectively.

Analysis of Adaptive Digital Feedback Linearization Techniques

A new lookup-table linearization technique is developed based on the digital feedback and digital feedback/predistortion (DFBPD) concepts. The linearization characteristics are investigated through system simulation of a real power-amplifier model with 90-W peak envelope power. The DFB suppresses forward-path nonlinear distortion as a gain reduction due to the FB effect, and this technique enhances the system tolerance without any bandwidth limitation. As the PD network is added to the FB loop, the linearization performance and system tolerance are further improved because of more accurate PD signal extraction. In addition, the gain is purely determined by the FB path, so the gain fluctuation in the forward path, including amplifier aging and temperature effects, is suppressed. The analysis and simulation allow experimental evaluation of the linearization mechanism and performance of the DFBPD technique for an 802.16 e mobile Worldwide Interoperability for microwave access signal.

Non-decimation FIR filter for digital RF sampling receiver with wideband operation capability

In order to realize a discrete-time filter for wideband signal processing, a new finite impulse response filter (FIR) has been developed. The filter maintains the moving average effect, but the decimation function is removed in order to realize a cascadable filter. By cascading the proposed FIR filter with a conventional FIR filter, about −60 dB attenuation across 50 MHz signal bandwidth is possible, and by the cascade more stages, the bandwidth can be even wider. This bandwidth is wide enough to process the signals of the next generation systems, opening up the way of utilizing the sampling receiver.

A Noise Optimized Passive Mixer for Charge-Domain Sampling Applications

This paper presents a circuit design technique, based on a CMOS charge-domain passive mixer, for WLAN applications in a 2.4 GHz band. The CMOS passive mixer is designed to mitigate the critical flicker noise problem that is frequently encountered in constitution of direct conversion receivers. The charge-domain method is employed to improve the high frequency performance and noise characteristic. The designed circuit is composed of a trans-conductance amplifier and a passive mixer with a capacitive charge storing load. Fabricated in 0.13 μm CMOS process, this charge-domain mixer achieves a low flicker noise with corner frequency of under 100 kHz, 8.1 dB noise figure, 10.6 dB conversion voltage gain, 2.5 dBm IIP3, and –5.7 dBm P1dB with 2.4 GHz LO driving at 5 dBm. It consumes 4.31 mA from 1.5 V supply.

A study of threshold switching of NbO2 using atom probe tomography and transmission electron microscopy.

Threshold switching is a phenomenon where the resistivity of an insulating material changes and the insulator exhibits metallic behavior. This could be explained by phase transformation in oxide materials; however, this behavior is also seen in amorphous insulators. In this study, through an ex-situ experiment using transmission electron microscopy (TEM), we proved that threshold switching of amorphous NbO2 accompanies local crystallization. The change in I-V characteristics after electroforming was examined by evaluating the concentration profile. Atom probe tomography (APT) combined with in-situ TEM probing technique was performed to understand the threshold switching in amorphous NbO2. The local crystallization in amorphous NbO2 was validated by the observed difference in time-of-flight (ToF) between amorphous and crystalline NbO2. We concluded that the slower ToF of amorphous NbO2 (a-NbO2) compared with crystalline NbO2 (c-NbO2) is due to the resistivity difference and trap-assisted recombination.

A single-chip multi-mode RF front-end circuit and module for W-CDMA, PCS, and GPS applications

A single-chip, multi-mode RF front-end circuit for W-CDMA, PCS, and GPS is implemented for direct conversion receiver. Each circuit includes a LNA, mixer and I/Q distributor. The IIP2 of this module (not in GPS band) is over +45 dBm with RLOAD tuning circuits. The noise figures are less than 3.5 dB in both W-CDMA and PCS bands, and 3.8 dB in GPS band. The silicon area is 5.06 mm2 including the PADs. For a small size implementation, the circuit is integrated into a module whose size is 18 mm by 19 mm including SAW filters. The current consumptions from a 2.7 V supply in W-CDMA, PCS, and GPS modes are 37 mA, 37 mA, and 23 mA, respectively

A wideband LNA with dual-feedback for TV tuner

A wideband LNA is the first amplifying stage in TV tuner system. It requires a low noise figure with a sufficient gain and a high linearity such as high IIP2 and IIP3 due to the many adjacent channels. This paper represents the wideband CMOS LNA using a dual feedback for the tuner application, which can suppress the second and the third order distortions with a low noise and a suitable gain. In the dual feedback, the weak negative feedback improves the linearity of the transconductance partially, thereby maintaining the high gain and low noise. The residual distortion and the distortion of the buffer are cancelled by the positive feedback. Consequently, the proposed wideband LNA with the dual feedback improves noise figure and linearity with a high gain. The LNA fabricated in 0.18 µm RF CMOS demonstrates the expected performances.

Improving the Linearity of CMOS LNA Using the Post IM3 Compensator

In this paper, a new linearization method has been proposed for a CMOS low noise amplifier(LNA) using the Post IM3 Compensator. The fundamental operating theory of the proposed method is to cancel the IM3 components of the LNA output signal by generating another IM3 components, which are out-phase with respect to that of the LNA, from the Post IM3 Compensator. A single stage common-source LNA has been designed to verify the linearity improvement of the proposed method through 0.13 ㎛ RF CMOS process for WiBro system. The designed LNA achieves +7.8 ㏈m of input-referred 3 rd -order intercept point (ⅡP3) with 13.2 ㏈ of Power Gain, 1.3 ㏈ of noise figure and 5.7 mA @1.5 V power consumption. IIP3 is compared with a conventional single stage common-source LNA, and it shows IIP3 is increased by +12.5 ㏈ without degrading other features such as gain and noise figure.