Chien-Chin Wang

Design and Analysis of a 21–29-GHz Ultra-Wideband Receiver Front-End in 0.18-

This paper reports the design and analysis of 21-29-GHz CMOS low-noise amplifier (LNA), balun and mixer in a standard 0.18-μm CMOS process for ultra-wideband automotive radar systems. To verify the proposed LNA, balun, and mixer architectures, a simplified receiver front-end comprising an LNA, a double-balanced Gilbert-cell-based mixer, and two Marchand baluns was implemented. The wideband Marchand baluns can convert the single RF and local oscillator (LO) signals to nearly perfect differential signals over the 21-29-GHz band. The performance of the mixer is improved with the current-bleeding technique and a parallel resonant inductor at the differential outputs of the RF transconductance stage. Over the 21-29-GHz band, the receiver front-end exhibits excellent noise figure of 4.6±0.5 dB, conversion gain of 23.7±1.4 dB, RF port reflection coefficient lower than -8.8 dB, LO-IF isolation lower than -47 dB, LO-RF isolation lower than -55 dB, and RF-IF isolation lower than -35.5 dB. The circuit occupies a chip area of 1.25×1.06 mm2, including the test pads. The dc power dissipation is only 39.2 mW.

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We report a 79 GHz mixer for direct up-conversion using 90 nm CMOS technology. In the mixer, an enhanced double-balanced Gilbert cell with current injection is used to reduce power consumption, and dual negative resistance compensation (NRC) is used to improve conversion gain (CG). In addition, it also includes two Marchand baluns: the single LO input signal to differential signal is converted by one of the baluns, and the differential RF output signal to single signal is converted by the other. The mixer consumes 13.6 mW, achieving IF-port input reflection coefficient (S11) of - 11.4 dB at 0.1 GHz, LO-port input reflection coefficient (S22) of - 12.2 ~ - 28.7 dB for frequencies 75-90 GHz. At IF of 0.1 GHz and RF of 78.1 GHz, the mixer achieves CG of 2.1 dB and LO-RF isolation of 35.9 dB, the best CG and isolation results ever reported for a W-band silicon-based mixer with power consumption lower than 15 mW.

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A low noise-figure (NF) and high power gain (S21) 3 ~ 10 GHz ultra-wideband low-noise amplifier (UWB LNA) with excellent phase linearity using 0.18 μm CMOS technology is reported. An enhanced π-match input network is used to achieve wideband input impedance matching as well as high and flat S21. To achieve low and flat NF, the pole frequency and pole quality factor of the second-order NF frequency response are tuned to approximate the maximally flat condition. The LNA consumes 18 mW, achieving S11 better than -10 dB for frequency lower than 12.2 GHz and group-delay (GD) variation smaller than ±14.6 ps for frequencies 3 ~ 10 GHz. Additionally, high and flat S21 of 13.7 ± 1.5 dB is achieved for frequencies 1 ~ 12.5 GHz, which means the corresponding 3-dB bandwidth is 11.5 GHz. Furthermore, the LNA achieves minimum NF of 2.2 dB at 4 GHz and NF of 2.3 ± 0.1 dB for frequencies of 3 ~ 10 GHz, one of the best NF results ever reported for a 3 ~ 10 GHz CMOS LNA.

13.6 mW 79 GHz CMOS Up-Conversion Mixer With 2.1 dB Gain and 35.9 dB LO-RF Isolation

A 3.1~10.6 GHz ultra-wideband low-noise amplifier (UWB LNA) with excellent phase linearity property (group-delay variation is only ±15.8 ps across the whole band) using standard 0.18 μm CMOS technology is reported. Both high and flat power gain (S21) and low and flat noise figure (NF) frequency responses are achieved by tuning the pole frequencies and pole quality factors of the second-order gain and NF frequency responses to approximate the maximally flat condition simultaneously. The LNA dissipates 11.8 mW power and achieves input return loss (S11) smaller than -10.2 dB, high and flat S21 of 12.52±0.81 dB, and low and flat NF of 2.87±0.19 dB over the 3.1~10.6 GHz band. To the authors knowledge, this is one of the lowest NFs ever reported for a 3.1~10.6 GHz UWB CMOS LNA. The measured 1-dB compression point (P1dB) and input third-order inter-modulation point (IIP3) are -16 dBm and -6.5 dBm, respectively, at 6 GHz.

High-Performance Wideband Low-Noise Amplifier Using Enhanced

A 94 GHz CMOS down-conversion mixer is reported. RF negative resistance compensation (NRC) technique, i.e., PMOS LC-oscillator-based RF transconductance (GM) stage load, is used to increase the output impedance and suppress the feedback capacitance Cgd of RF GM stage. As a result, conversion gain (CG), noise figure (NF) and LO-RF isolation of the mixer are enhanced. For frequencies of 80~110 GHz, the mixer consumes 6.3 mW and achieves excellent RF-port input reflection coefficient (S11) of -8.7~ -22 dB and LO-port input reflection coefficient (S22) of -10.3~-19.4 dB. In addition, the mixer achieves excellent CG of 4.1~11.6 dB, NF of 15.8~18.1 dB, and LO-RF isolation of 42.1~54 dB for frequencies of 80~110 GHz, one of the best CG, NF and LO-RF isolation results ever reported for a W-band CMOS down-conversion mixer.

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A low-power 3.2~9.7 GHz low-noise amplifier (LNA) with excellent stop-band rejection by 0.18 μm CMOS technology is demonstrated. High stop-band rejection is achieved by using a passive band-pass filter with three finite transmission zeros (in the input terminal of the common-gate LNA), one of which (ωz1 = 0.9 GHz) is in the low-frequency stop-band and the other two (ωz3 and ωz5) are in the high-frequency stop-band. In addition, an active notch filter is used in the output terminal of the LNA to introduce another low-frequency stop-band transmission zero (ωz2) at 2.4 GHz. The LNA consumes 4.68 mW and achieves S11 of -10~ -39.5 dB, S21 of 9.3±1.5 dB, and an average NF of 6 dB over the 3.2~9.7 GHz band. Moreover, the stop-band interferers can be effectively attenuated. The measured stop-band rejection is better than 21.6 dB for frequencies DC~2.5 GHz and 11.2~20 GHz. The corresponding stop-band rejection at 0.9 GHz, 1.8 GHz, 2.4 GHz, 17.6 GHz, and 19.5 GHz are 53.3 dB, 26.4 dB, 26.5 dB, 60 dB, and 59.5 dB, respectively.

-Match Input Network

Two elliptic CMOS dual baluns for W-band (75–110 GHz) transceiver are reported. The input couple-line width of the first dual balun (i.e. dual balun A) is 4 µm. For contrast, the input couple-line width of the second dual balun (i.e. dual balun B) is 2 µm. The width of all the other couple-lines and all space of the two dual baluns is 2 µm. The dual balun can be applied to a power amplifier for four-way equal power dividing. Both the dual baluns occupy a small chip area of 0.0256 mm². For frequencies of 75∼110 GHz, dual balun A achieves S<inf>11</inf> of −10.1∼ −20.2 dB, S<inf>21</inf> of −7.6∼ −9.2 dB, S<inf>31</inf> of −8.5∼ −10.3 dB, S<inf>41</inf> of −7.4∼ −9 dB, S<inf>51</inf> of −9.2∼ −10.4 dB, magnitude of amplitude imbalance (MAI) of 0.42∼1.31 dB and phase difference (PD) of 180°∼ 186.3° for ports 2∼3, and MAI of 0.95∼2.4 dB and PD of 175.1°∼186.3° for ports 4∼5. In addition, dual balun B achieves S<inf>11</inf> of −10.1∼ −18.1 dB, S<inf>21</inf> of −7.8∼ −9 dB, S<inf>31</inf> of −7.8∼ −9.4 dB, S<inf>41</inf> of −7.5∼ −9.5 dB, S<inf>51</inf> of −7.8∼ −9.9 dB, MAI of 0∼0.75 dB and PD of 173.4°∼180° for ports 2∼3, and MAI of 0∼0.95 dB and PD of 173.4°∼181.3° for ports 4∼5, close to those of dual balun A. This means the elliptical dual balun has a large design margin for the input couple-line width. The prominent results of the elliptic dual balun indicate that it is suitable for W-band systems.

A 2.87±0.19dB NF 3.1∼10.6GHz ultra-wideband low-noise amplifier using 0.18µm CMOS technology

A wideband power amplifier (PA) for 60~94 GHz transceivers using standard 90 nm CMOS technology is reported. The PA comprises a two-stage common-source (CS) cascaded input stage with wideband T-type input, inter-stage and output matching networks, followed by a two-way CS gain stage using Y-shaped power divider and combiner, and a four-way CS output stage using dual Y-shaped power divider and combiner. Instead of the traditional area-consumed power divider and combiner with all ports impedance matching to 50 fi, in this work, Y-shaped and dual Y-shaped power divider and combiner that constitute miniature low-loss transmission-line inductors are used for more flexible inter-stage impedance matching and easier bias design. The PA consumes 90 mW and achieves power gain (S21) of 16 dB, 21 dB and 10.4 dB, respectively, at 60 GHz, 77 GHz and 94 GHz. In addition, the PA achieves excellent saturated output power (PSAT) of 13.2 dBm, 12 dBm and 10.6 dBm, respectively, at 60 GHz, 77 GHz and 94 GHz. The corresponding maximal PAE is 19.5%, 16% and 8.9%, respectively, at 60 GHz, 77 GHz and 94 GHz. These results demonstrate the proposed PA architecture is promising for 60~94 GHz communication systems.

6.3 mW 94 GHz CMOS Down-Conversion Mixer With 11.6 dB Gain and 54 dB LO-RF Isolation

A 1.9~22.5 GHz wideband LNA based on the current-reused cascade configuration in 90 nm CMOS is reported. The wideband input-impedance matching was achieved by taking advantage of the resistive shunt-shunt feedback in conjunction with a parallel LC load to make the input network equivalent to two parallel RLC branches, i.e., a second-order wideband BPF. The wideband output matching was also achieved by making the output network equivalent to a second-order wideband BPF. Theoretical analysis shows that both the frequency response of input matching and NF can be described by second-order functions with quality factors as parameters. The LNA dissipates 9.96 mW and achieves low and flat NF of 3.24±0.5 dB and high and flat S21 of 12.02±1.5 dB for frequencies 1.9~22.5 GHz. The corresponding FOM is 7.44 GHz/mW, one of the highest FOMs ever reported for an LNA with bandwidth around 20 GHz.

A low-power 3.2∼9.7GHz ultra-wideband low noise amplifier with excellent stop-band rejection using 0.18µm CMOS technology

A planar miniature CMOS dual balun with unequal coupled-line width for millimeter-wave (MMW) transceiver is reported. The dual balun can be applied to a star mixer or a four-way power amplifier for four-way equal power dividing. The dual balun occupies a small chip area of 0.0252 mm2 and achieves S11 smaller than -12 dB for frequencies of 50~110 GHz. For frequencies of 55~65 GHz, the dual balun achieves S21 of -7.6~ -7.9 dB, S31 of -7.9~ -9 dB, S41 of -7.5~ -7.9 dB, S51 of -7.8~ -8.9 dB, magnitude of amplitude imbalance (MAI) of 0.34~1.1 dB and phase difference (PD) of 179.22°~180.78° for ports 2~3, and MAI of 0.3~1 dB and PD of 178.83°~180.48° for ports 4~5. For frequencies of 75~85 GHz, the dual balun achieves S21 of -9.1~ -10.5 dB, S31 of -10.7~ -12.7 dB, S41 of -9.1~ -10.5 dB, S51 of -10.7~ -12.6 dB, MAI of 1.7~2.2 dB and PD of 179.42°~180.59° for ports 2~3, and MAI of 1.6~2.1 dB and PD of 179.93°~180.73° for ports 4~5. The state-of-the-art results of the proposed dual balun indicate that it is suitable for 60 GHz and 77 GHz communication systems.