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Featured researches published by Y.-S. Lin.


topical meeting on silicon monolithic integrated circuits in rf systems | 2017

High-performance elliptic dual balun for W-band CMOS transceiver

Yo-Sheng Lin; Y.-S. Lin; Kai-Siang Lan; Ming-Huang Kao; Chih-Chung Chen; Chien-Chin Wang

Two elliptic CMOS dual baluns for W-band (75–110 GHz) transceiver are reported. The input couple-line width of the first dual balun (i.e. dual balun A) is 4 µm. For contrast, the input couple-line width of the second dual balun (i.e. dual balun B) is 2 µm. The width of all the other couple-lines and all space of the two dual baluns is 2 µm. The dual balun can be applied to a power amplifier for four-way equal power dividing. Both the dual baluns occupy a small chip area of 0.0256 mm<sup>2</sup>. For frequencies of 75∼110 GHz, dual balun A achieves S<inf>11</inf> of −10.1∼ −20.2 dB, S<inf>21</inf> of −7.6∼ −9.2 dB, S<inf>31</inf> of −8.5∼ −10.3 dB, S<inf>41</inf> of −7.4∼ −9 dB, S<inf>51</inf> of −9.2∼ −10.4 dB, magnitude of amplitude imbalance (MAI) of 0.42∼1.31 dB and phase difference (PD) of 180°∼ 186.3° for ports 2∼3, and MAI of 0.95∼2.4 dB and PD of 175.1°∼186.3° for ports 4∼5. In addition, dual balun B achieves S<inf>11</inf> of −10.1∼ −18.1 dB, S<inf>21</inf> of −7.8∼ −9 dB, S<inf>31</inf> of −7.8∼ −9.4 dB, S<inf>41</inf> of −7.5∼ −9.5 dB, S<inf>51</inf> of −7.8∼ −9.9 dB, MAI of 0∼0.75 dB and PD of 173.4°∼180° for ports 2∼3, and MAI of 0∼0.95 dB and PD of 173.4°∼181.3° for ports 4∼5, close to those of dual balun A. This means the elliptical dual balun has a large design margin for the input couple-line width. The prominent results of the elliptic dual balun indicate that it is suitable for W-band systems.


radio and wireless symposium | 2016

A wideband power amplifier with 13.2 dBm Psat and 19.5% PAE for 60∼94 GHz wireless communication systems in 90 nm CMOS

Yo-Sheng Lin; Van Kien Nguyen; Jia-Wei Gao; Chien-Chin Wang; Y.-S. Lin; Chih-Chung Chen

A wideband power amplifier (PA) for 60~94 GHz transceivers using standard 90 nm CMOS technology is reported. The PA comprises a two-stage common-source (CS) cascaded input stage with wideband T-type input, inter-stage and output matching networks, followed by a two-way CS gain stage using Y-shaped power divider and combiner, and a four-way CS output stage using dual Y-shaped power divider and combiner. Instead of the traditional area-consumed power divider and combiner with all ports impedance matching to 50 fi, in this work, Y-shaped and dual Y-shaped power divider and combiner that constitute miniature low-loss transmission-line inductors are used for more flexible inter-stage impedance matching and easier bias design. The PA consumes 90 mW and achieves power gain (S21) of 16 dB, 21 dB and 10.4 dB, respectively, at 60 GHz, 77 GHz and 94 GHz. In addition, the PA achieves excellent saturated output power (PSAT) of 13.2 dBm, 12 dBm and 10.6 dBm, respectively, at 60 GHz, 77 GHz and 94 GHz. The corresponding maximal PAE is 19.5%, 16% and 8.9%, respectively, at 60 GHz, 77 GHz and 94 GHz. These results demonstrate the proposed PA architecture is promising for 60~94 GHz communication systems.


International Journal of Electronics | 2018

Design and Implementation of 75~110 GHz Elliptical Dual Balun in 90 nm CMOS for W-Band Transceiver

Yo-Sheng Lin; Y.-S. Lin

ABSTRACT We demonstrate an elliptical dual balun structure for 94 GHz image radar transceiver. The results of two prototypes with small chip size of 0.0256 mm2 are reported. For the first one (i.e. dual balun 1), the input couple-line width is 4 mm and coupled-line space is 2 µm. That is, the distance between the output couple-lines is 8 mm. For the second one (i.e. dual balun 2), the input couple-line width is 2 mm and coupled-line space is 3 mm. The distance between output couple-lines is also 8 mm. The other geometric parameters of the two dual baluns are the same. In a star double-balanced mixer or a four-way power amplifier, the dual balun is applicable for four-way power splitting. Over the 92 ~ 96 GHz, dual balun 1 attains prominent S11 of −14.4~ −16.4 dB, S21 of −7.61~ −7.67 dB, S31 of −8.78~ −8.93 dB, S41 of −7.43~ −7.6 dB, S51 of −9.68~ −9.89 dB, amplitude imbalance magnitude (AIM) smaller than 2.39 dB, and phase difference deviation (PDD) smaller than 3.6°. Furthermore, dual balun 2 attains remarkable S11 of −13.8~ −14.8 dB, S21 of −7.8~ −7.95 dB, S31 of −8~ −8.39 dB, S41 of −7.46~ −7.72 dB, S51 of −8.18~ −8.54 dB, AIM smaller than 0.95 dB, and PDD smaller than 3.8°, close to those of dual balun 1.


usnc ursi radio science meeting | 2017

94 GHz CMOS down-conversion micromixer

Yo-Sheng Lin; Kai-Siang Lan; Ching-hung Peng; Y.-S. Lin

A W-band (75∼110 GHz) down-conversion mixer for 94 GHz image radar sensors in 90 nm CMOS is reported. Micromixer-based gain-enhanced technique, i.e. inductive series-peaking gain-enhanced single-in differential-out (SIDO) class-AB RF GM stage, is used to increase the output impedance and suppress the feedback capacitance Cgd of RF GM stage. Hence, conversion gain (CG), noise figure (NF) and LO-RF isolation of the mixer can be enhanced. The mixer consumes 7.2 mW and achieves excellent RF-port input reflection coefficient of −10∼ −14.4 dB for frequencies of 81.4∼110 GHz. The corresponding −10 dB input matching bandwidth is greater than 28.6 GHz. In addition, for frequencies of 90∼96 GHz, the mixer achieves CG of 10.5∼12 dB (the corresponding 3-dB CG bandwidth is 22 GHz) and LO-RF isolation of 40.2∼46.2 dB, one of the best CG and LO-RF isolation results ever reported for a down-conversion mixer with operation frequency around 94 GHz. Furthermore, the mixer achieves an input third-order intercept point (IIP3) of 1 dBm at 94 GHz. These results demonstrate the proposed down-conversion mixer architecture is very promising for 94 GHz image radar sensors.


usnc ursi radio science meeting | 2017

94 GHz VCO using negative capacitance technique

Yo-Sheng Lin; Kai-Siang Lan; Y.-S. Lin; Ming-Yuan Chuang

A 94 GHz voltage-controlled oscillator (VCO) using both LC-source-degeneration-based (LCSD-based) negative capacitance technique and series-peaking gain enhancement technique is demonstrated in a 90 nm CMOS process. The LCSD-based negative capacitance is made by adding two tunable LC tanks, which use NMOSFET varactors as the needed capacitors, to the source terminals of the cross-coupled transistor pair of the VCO. Compared with the traditional cross-coupled transistor pair, the proposed one significantly decreases the tunable equivalent parallel capacitance (CEQ) to zero and even a negative value. This in turn results in the increase of both the operation frequency and the tuning range of the VCO. The VCO draws 8.3 mA current from a 1 V power supply, i.e. it only consumes 8.3 mW. The VCO achieves a tuning range of 91∼96 GHz. In addition, the VCO achieves an excellent low phase-noise of −98.3 dBc/Hz at 1 MHz offset from 95.16 GHz. The corresponding FOM is −188.5 dBc/Hz, one of the best results ever reported for a V-or W-band CMOS VCO. The circuit occupies a small chip area of 0.75×0.42 mm2, i.e. 0.315 mm2, excluding the test pads.


radio and wireless symposium | 2016

Design and implementation of a high-performance CMOS dual balun for millimeter-wave star mixer and four-way power amplifier

Yo-Sheng Lin; Y.-S. Lin; Chien-Chin Wang; Chih-Chung Chen; Van Kien Nguyen

A planar miniature CMOS dual balun with unequal coupled-line width for millimeter-wave (MMW) transceiver is reported. The dual balun can be applied to a star mixer or a four-way power amplifier for four-way equal power dividing. The dual balun occupies a small chip area of 0.0252 mm2 and achieves S11 smaller than -12 dB for frequencies of 50~110 GHz. For frequencies of 55~65 GHz, the dual balun achieves S21 of -7.6~ -7.9 dB, S31 of -7.9~ -9 dB, S41 of -7.5~ -7.9 dB, S51 of -7.8~ -8.9 dB, magnitude of amplitude imbalance (MAI) of 0.34~1.1 dB and phase difference (PD) of 179.22°~180.78° for ports 2~3, and MAI of 0.3~1 dB and PD of 178.83°~180.48° for ports 4~5. For frequencies of 75~85 GHz, the dual balun achieves S21 of -9.1~ -10.5 dB, S31 of -10.7~ -12.7 dB, S41 of -9.1~ -10.5 dB, S51 of -10.7~ -12.6 dB, MAI of 1.7~2.2 dB and PD of 179.42°~180.59° for ports 2~3, and MAI of 1.6~2.1 dB and PD of 179.93°~180.73° for ports 4~5. The state-of-the-art results of the proposed dual balun indicate that it is suitable for 60 GHz and 77 GHz communication systems.


radio and wireless symposium | 2016

A low noise figure and high conversion gain down-conversion mixer for 94 GHz image radar sensors in 90 nm CMOS

Yo-Sheng Lin; Chih-Chung Chen; Jay-Ming Liu; Y.-S. Lin; Van Kien Nguyen

A 94 GHz down-conversion mixer in 90 CMOS process is reported. The mixer has a double-balanced Gilbert cell with an NMOS LC-oscillator-based RF transconductance (GM) stage load for noise figure (NF) suppression and conversion gain (CG) enhancement. The mixer consumes 9.5 mW and achieves excellent RF-port input reflection coefficient of -27.2 dB at 94 GHz, LO-port input reflection coefficient of -15.1 dB at 93.9 GHz, and IF-port input reflection coefficient of -10.3 dB at 0.1 GHz. In addition, the mixer achieves CG of 4.9~7.9 dB, NF of 15.4~21.2 dB and LO-RF isolation of 38.5~44.7 dB for frequencies of 75~100 GHz, one of the best CG, NF and LO-RF isolation results ever reported for a down-conversion mixer with operation frequency around 75~100 GHz. Furthermore, the mixer achieves an excellent input third-order intercept point (IIP3) of 2.6 dBm. These results demonstrate the proposed down-conversion mixer is promising for 94 GHz image radar sensors.


Electronics Letters | 2011

0.99 mW 3-10 GHz common-gate CMOS UWB LNA using T-match input network and self-body-bias technique

Jin-Fa Chang; Y.-S. Lin


Electronics Letters | 2008

2.5 dB NF 3.1-10.6 GHz CMOS UWB LNA with small group-delay variation

Hung-Yu Yang; Y.-S. Lin; Chi-Chen Chen


Electronics Letters | 2009

3-10 GHz low-power, low-noise CMOS distributed amplifier using splitting-load inductive peaking and noise-suppression techniques

Jin-Fa Chang; Y.-S. Lin

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Yo-Sheng Lin

National Chi Nan University

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Chien-Chin Wang

National Chi Nan University

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Chih-Chung Chen

National Chi Nan University

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Kai-Siang Lan

National Chi Nan University

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Jin-Fa Chang

National Chi Nan University

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Shey-Shi Lu

National Taiwan University

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Chi-Chen Chen

National Chi Nan University

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Jen-How Lee

National Chi Nan University

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Van Kien Nguyen

National Chi Nan University

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Hsin-Chen Lin

National Chi Nan University

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