Chiung-Wei Lin

A novel laser-processed self-aligned gate-overlapped LDD poly-Si TFT

A novel process for fabricating self-aligned gate-overlapped LDD (SAGOLDD) poly-Si thin film transistors (TFTs) was demonstrated. Laser irradiation for dopant activation was performed from the backside of the quartz wafer. The graded LDD structure was naturally formed under the gate edges due to the lateral diffusion of the dopants during the laser activation. In comparison with the conventional laser-processed self-aligned poly-Si TFTs, the SAGOLDD poly-Si TFTs exhibited lower leakage current, suppressed kink effect, and higher reliability. Moreover, the proposed process was simple and very suitable for low-temperature processing.

High-Efficiency Crystallization of Amorphous Silicon Films on Glass Substrate by New Metal-Mediated Mechanism

A new crystallization technique for crystallizing amorphous silicon (a-Si) film with a low thermal budget is proposed. A highly crystalline polycrystalline silicon (poly-Si) film can be rapidly obtained on a low-cost glass substrate by this technique. A material with a large IR absorption coefficient provides energy for crystallizing a-Si film into poly-Si film. By this new technique, we can make highly crystalline poly-Si film efficiently. Atomic force microscopy (AFM), Raman scattering, X-ray diffraction (XRD), scanning electron microscopy (SEM), and transmission electron microscopy (TEM) with energy dispersive spectrometer (EDS) measurements demonstrated that a-Si film can be fully crystallized by annealing with five 5 s pulses at 870°C. The roughness of film processed by this new technique is only 0.59 nm which is superior to the 7.8 nm obtained by the conventional excimer laser crystallization (ELC) technique. The average grain size and grain growth rate obtained in this technique are 0.82 µm and 120 µm/min, respectively.

A novel thin-film transistor with vertical offset structure

A novel device structure consisting of conventional hydrogenated amorphous silicon (a-Si:H) for the source and drain and of hydrogenated microcrystalline soilicon ( µc-Si:H) for the channel region which can improve the performance of thin-film transistors (TFTs) has been proposed and fabricated. Undoped a-Si:H serves as a blocking layer to suppress the OFF-state current in the drain region which is comparable to that of conventional a-Si:H TFT with a much higher drivability. The fabrication process is simple and inexpensive with the possibility of high reliability.

The effects of microcrystalline silicon film structure on low-high-low band-gap thin film transistor

The effects of hydrogenated microcrystalline silicon (μc-Si:H) film with various crystalline factors on thin-film transistors (TFTs) with low-high-low band gap structure are studied. Compared to hydrogenated amorphous silicon (a-Si:H) TFT with conventional inverted-stagger structure, the device with μc-Si:H film of high crystalline factor in the active channel depicts improved interfacial active layer near the gate insulator interface as well as the later-grown bulk active layer, resulting in improved device parameters including field effect mobility, threshold voltage, subthreshold swing and ON-current. While a-Si:H film of low crystalline factor and high-band-gap is proposed for the source and drain offset regions in the new device to prevent the band-to-band tunneling, thus alleviates the high OFF-current inherent in conventional μc-Si:H thin-film transistors, resulting in an improved ON/OFF current ratio.

Rapid thermal oxidation of zinc nitride film

In this work, a zinc nitride (ZnN) film was deposited at room temperature and subjected to pulse-mode rapid thermal oxidation. The physical and chemical structures of ZnN film were changed during the rapid thermal oxidation process. The presence of zinc-oxygen bonds in the oxidized ZnN film indicated that some nitrogen atoms within the ZnN film are replaced by oxygen atoms. Through the rapid thermal oxidation process, ZnN was converted into a zinc oxide material containing nitrogen atoms. The oxidized ZnN possessed more acceptor states than donor states, which resulted in p-type conduction. The carrier concentration, mobility, and resistivity of the rapid-thermal-oxidized ZnN were 6.49 × 1018 cm−3, 12.9 cm2 V−1 s−1 and 0.7 Ω cm, respectively.

Tetragonal hafnium oxide film prepared by low-temperature oxidation

We used pulse-mode rapid thermal annealing to reoxidize a sputter-deposited hafnium oxide film. This reoxidation enabled the densification of the processed film, and low-temperature tetragonal hafnium oxide was obtained. When a hafnium oxide/silicon structure was subjected to the proposed process, some oxygen atoms were formed by hafnium oxide, which then react with silicon. A thin hafnium silicate layer was formed between reoxidized hafnium oxide and silicon, which was beneficial for improving the interfacial condition of hafnium oxide and silicon. The obtained low-temperature tetragonal hafnium oxide film had a high dielectric constant of 23 and a high dielectric strength of 12.7 MV/cm.

Comparison of poly-Si films deposited by UHVCVD and LPCVD and its application for thin film transistors

The ultra-high vacuum chemical vapor deposition (UHVCVD) system can deposit poly-Si film without any laser or furnace annealing. The uniformity of threshold voltage and mobility is superior to that deposited by low-pressure chemical vapor deposition (LPCVD) system. However, due to the deposition in polycrystalline phase for UHVCVD, the film surface is rough and results in low field effect mobility compared to that obtained by LPCVD using disilane (Si2H6) in amorphous phase followed by solid phase crystallization (SPC). The on–off current ratio for UHVCVD deposited poly-Si thin film transistors (TFTs) is approximately one order smaller, however, the leakage current for LPCVD SPC TFTs is higher. In this experiment, NH3 was introduced to both of the two samples to improve the device performance. It can be shown that improvements on device characteristics are more significant for UHVCVD deposited poly-Si TFTs, e.g. threshold voltage decreased dramatically and the on–off current ratio improved by two orders of magnitude. r 2002 Elsevier Science Ltd. All rights reserved.

An Investigation of Bias Temperature Instability in Hydrogenated Low-Temperature Polycrystalline Silicon Thin Film Transistors

The instability mechanisms of the hydrogenated n-channel low-temperature polycrystalline silicon thin film transistors under on-state stress were investigated with various bias stress conditions and device channel widths. It was found that hot carrier degradation which originated from a high drain electric field and self-heating during high current operation were the two dominant mechanisms responsible for device degradation. An electrically reversible depassivation/passivation phenomenon was also found in devices under high current stress, but not in those under hot carrier stress. It was inferred that the self-heating effect would accelerate the bond breakage and diffusion of hydrogen ions, thus enhancing the rate of depassivation/passivation. Moreover, when the current in the hot carrier stress mode was sufficiently high, self-heating became the dominant degradation mechanism and hot carrier degradation phenomenon was also suppressed for devices with large channel width. Meanwhile, the electrically reversible depassivation/passivation phenomenon also occurred in this case.

A high-performance thin-film transistor with a vertical offset structure

In this study, we propose a novel device structure combined with conventional hydrogenated amorphous silicon (a-Si:H) for the source and drain regions and microcrystalline silicon (/spl mu/c-Si:H) for the channel region to obtain a high-performance thin-film transistor (TFT). This is a vertical a-Si:H offset structure used to suppress OFF-state current to a small value which is comparable to the conventional a-Si:H TFTs with a much higher drivability. The fabrication process is simple, low temperature (/spl les/300/spl deg/C), and low cost, with a potential for high reliability.

Ambipolar Performances of Novel Amorphous Silicon-Germanium Alloy Thin-Film Transistors

The limitation of low hole mobility in hydrogenated amorphous silicon thin-film transistors (a-Si:H TFTs) was overcome in this present work by utilizing hydrogenated amorphous silicon-germanium (a-Si1-xGex:H) alloys as the active channel of TFTs. The performance of hydrogenated amorphous silicon-germanium thin film transistors (a-SiGe:H TFTs) was optimized by switching the germane-to-silane flow ratio. The fabricated a-SiGe:H TFT with 12 at% germanium content was measured as possessing an electron mobility of 0.71 cm2/Vs and a hole mobility of 0.54 cm2/Vs. The on/off current ratio ranging over almost six orders of magnitude in both conduction modes was obtained. Thus a-SiGe:H TFT has offered the opportunity for upgrading of a-Si:H TFTs and would be feasible for application in [CMOS] circuits.