Chong-Cheng Fu

Ultrathin Polymer Films for Microlithography

Ultrathin (14–22 nm) poly(methylmethacrylate) (PMMA) films prepared by both spin casting and Langmuir–Blodgett (LB) techniques and novolac films prepared by spin casting have been explored as high‐resolution electron beam resists. One‐eighth micron lines‐and‐spaces patterns (equal to the smallest beam diameter available) have been achieved by using a Perkin Elmer MEBES I pattern generation system as the exposure tool, and the definition of 45‐nm features has recently been achieved by using a high‐resolution electron beam lithography system. [J. H. Newman, K. E. Williams, and R. F. W. Pease, J. Vac. Sci. Technol. B 5, 88 (1987)]. The etch resistance of such films is sufficiently good to allow patterning of a chromium film suitable for photomask fabrication. The most surprising result has been that the pinhole densities in 14.3‐nm LB PMMA film and 22‐nm spin‐cast novolac film are only a few per cm2, considerably lower than the density in spin‐cast PMMA films of comparable thicknesses.

A novel technique for detecting lithographic defects

This method uses accelerated electrolytic etching of metal by photoresist developer, and therefore permits developing and etching in one solution, eliminating the need for two separate process steps. This procedure is the key to identifying strictly lithographic defects, and is applied to the verification of the voting lithography scheme. Defects were deliberately introduced on masks used in these experiments. Almost complete elimination of these defects on wafer patterns is achieved using vote-taking lithography. >

A multiple exposure strategy for reducing butting errors in a raster‐scanned electron‐beam exposure system

As integrated circuit (IC) feature sizes shrink, correspondingly greater demands are put on the reticle writing systems for pattern placement accuracy. In raster‐scanned electron‐beam exposure systems such as MEBES which build up the pattern as a mosaic of stripes, quite small placement errors at the stripe boundaries can have serious consequences in terms of the electrical performance of the finished IC. The specifications of butting error for these exposure systems is typically 0.1 μm for a 0.25‐μm address size. While this is in itself not a serious error for most features, it can be troublesome if it shows up as a linewidth error for a submicron gate electrode. Here we have demonstrated that this error can be substantially reduced by using multiple exposures or scans to build up the pattern data so that in each exposure the stripe boundary is offset within the pattern from the remainder of the exposures. Thus, for N exposures, only 1/N of the total dose at any one stripe boundary includes the placement...

Characterization Of Voting Suppression Of Optical Defects Through Simulation

Two-dimensional image simulation with SPLAT and resist profile dissolution simulation with SAMPLE are used to explore the suppression of large defects with voting in projection printing. The parameters chosen are for the Ultratech 1000 stepper due to the availability of experimental data with programmed defects. The results are stated in terms of feature and defect sizes in λ/NA where λ, is the wavelength and NA is the numerical aperture. Models based on 1) full resist dissolution simulation, 2) 30% clear field intensity of simulated images and 3) simple algebraic approximations are used. The case of using three votes on transparent defects placed at various locations in line patterns is studied in detail. An excellent fit between simulation and experimental results was obtained. It was also found that defect suppression with 3:1 voting is always a factor of 3 for small defects, and improves for larger defects except both when the partial coherence is less than 0.5 and when defects are within 0.2 λ/NA of a neighboring feature. Voting may be used to overcome mask defects which are so large that they have bridged patterns on the wafer. For 10% linewidth variation, the use of voting raises the critical defect size from 0.24 to 0.5 λ/NA. The effects of process bias and overlay are also explored.

Elimination Of Mask-Induced Defects With Vote-Taking Lithography

The problem of ensuring adequately low density of defects in lithographic masks is becoming increasingly serious as circuit patterns become denser and more extensive. This paper discusses a radically alternative strategy to eliminate the effect of random defects on reticles. In this method, a number of reticle fields containing nominally identical patterns are aligned and exposed in sequence at the same site, each with an equal fraction of the nominal exposure dose. The optical intensity distribution impinging on the resist is the sum of the aerial images from these exposures. As a result, a random defect unique to a single reticle field affects only a minor part of the total exposure. The effect of this exposure deviation can then be minimized with an adequate resist contrast and a properly adjusted exposure dose. With the lithographic tools and resist process technology presently available, gross reticle defects can generally be reduced to minor distortions in the resultant features. A series of experiments have been performed with Shipley Microposit 1470 photoresist exposed with an Ultratech 900 1x wafer stepper, and demonstrated the feasibility of this technique. The effects of misalignment among fields, resist contrast, exposure dose, and defect size and type have been studied in particular. A novel etching process that permits the electrical detection of defects due to photolithography alone is being used to evaluate the effectiveness of this vote-taking scheme in VLSI patterning, and has demonstrated its capability of eliminating mask-induced defects, and no noticeable loss of lithographic yield when defect-free masks are used.

Template-Set Approach to VLSI Pattern Inspection

A new approach is described for the automatic detection of defects in VLSI circuit patterns such as photomasks and wafers. It is based on morphological feature extraction using templates that represent a set of local pixel configurations within a specified window. These templates are stored in content-addressable memories (CAMs) to facilitate parallel comparisons of window-pattern scanning over a tested image. Maskable CAMs reduce the size of a template set substantially. Two error-detection algorithms are implemented to detect both random defects and dimensional errors.

Defect Detection And Classification Using The Euler Number

A new approach to defect detection and classification in VLSI circuit pattern inspection is described, which employs the Euler number of a local image as a feature. Defect classification rules represented with the sum and diffierence of two Euler numbers for a local image and its complement are derived, and additional rules to eliminate false detections from acceptable edge roughness are introduced. Simulation results for real image data are also presented.