Christian Boit

Cloning Physically Unclonable Functions

As system security demands continue to evolve, Physically Unclonable Functions (PUFs) are a promising solution for secure storage on Integrated Circuits (ICs). SRAM PUFs are among the most popular types of PUFs, since they require no additional circuitry and can be implemented with on-die memories such as caches and data memory that are readily available on both ASICs and FPGAs. This work demonstrates that SRAM PUFs are not well suited as PUFs, as they do not meet several requirements that constitute an ideal PUF. The compact nature of SRAM, standard interconnects and resiliency to environmental effects make SRAM PUFs particularly easy to clone. We consider several ways in which SRAM PUFs can be characterized and demonstrate a Focused Ion Beam circuit edit with which we were able to produce a physical clone of our Proof-of-Concept SRAM PUF implementation. As a result of the circuit edit, when challenged, the physical clone produced an identical physical response to the original device. To the best of our knowledge, this is the first work in which a physical clone of a Physically Unclonable Function was produced.

Invasive PUF Analysis

In this work we consider the suitability of Phyiscaly Unclonable Functions (PUFs) for high-security applications. For PUFs to be considered secure in such scenarios they must be resilient to both semi-invasive and fully-invasive attacks. We introduce a new failure analysis technique for semi-invasive, single-trace, backside readout of logic states. We apply this technique to characterize the unique physical response of a memory-based PUF. With these results we identify several weakness in current PUF schemes. We extend current PUF definitions to be resilient against such attacks by requiring that PUFs be implemented in a serialized manner. Finally, we improve already existing PUF architectures to include these concepts.

Breaking and entering through the silicon

As the surplus market of failure analysis equipment continues to grow, the cost of performing invasive IC analysis continues to diminish. Hardware vendors in high-security applications utilize security by obscurity to implement layers of protection on their devices. High-security applications must assume that the attacker is skillful, well-equipped and well-funded. Modern security ICs are designed to make readout of decrypted data and changes to security configuration of the device impossible. Countermeasures such as meshes and attack sensors thwart many state of the art attacks. Because of the perceived difficulty and lack of publicly known attacks, the IC backside has largely been ignored by the security community. However, the backside is currently the weakest link in modern ICs because no devices currently on the market are protected against fully-invasive attacks through the IC backside. Fully-invasive backside attacks circumvent all known countermeasures utilized by modern implementations. In this work, we demonstrate the first two practical fully-invasive attacks against the IC backside. Our first attack is fully-invasive backside microprobing. Using this attack we were able to capture decrypted data directly from the data bus of the target ICs CPU core. We also present a fully invasive backside circuit edit. With this attack we were able to set security and configuration fuses of the device to arbitrary values.

Physical Characterization of Arbiter PUFs

As intended by its name, Physically Unclonable Functions PUFs are considered as an ultimate solution to deal with insecure storage, hardware counterfeiting, and many other security problems. However, many different successful attacks have already revealed vulnerabilities of certain digital intrinsic PUFs. Although settling-state-based PUFs, such as SRAM PUFs, can be physically cloned by semi-invasive and fully-invasive attacks, successful attacks on timing-based PUFs were so far limited to modeling attacks. Such modeling requires a large subset of challenge-response-pairs CRP to successfully model the targeted PUF. In order to provide a final security answer, this paper proves that all arbiter-based i.e. controlled and XOR-enhanced PUFs can be completely and linearly characterized by means of photonic emission analysis. Our experimental setup is capable of measuring every PUF-internal delay with a resolution of 6 picoseconds. Due to this resolution we indeed require only the theoretical minimum number of linear independent equations i.e. physical measurements to directly solve the underlying inhomogeneous linear system. Moreover, we neither require to know the actual PUF challenges nor the corresponding PUF responses for our physical delay extraction. On top of that devastating result, we are also able to further simplify our setup for easier physical measurement handling. We present our practical results for a real arbiter PUF implementation on a Complex Programmable Logic Device CPLD from Altera manufactured in a 180 nanometer process.

Quantitative Investigation of Laser Beam Modulation in Electrically Active Devices as Used in Laser Voltage Probing

Among the backside analysis techniques of integrated circuits, laser voltage probing provides signal levels of the nodes. In the past, signal interpretation has been empirically based. In this paper, for the first time, an in-depth investigation of signal origin and parametric measurements of active devices have been performed, and a concise physical model of laser beam absorption has been developed. In the laser measurements, switching metal-oxide-semiconductor field-effect transistors and their basic components - reverse-biased diodes and gates in inversion - have been studied parametrically. The results show the ranges and limits of linear signal-to-voltage correlation and match the model successfully.

Influence of GaN cap on robustness of AlGaN/GaN HEMTs

DC-Step-Stress-Tests of GaN HEMTs have been performed on wafers with and without GaN-cap. The tests consist of a step ramping of drain-source voltage VDS by 5V every two hours at off-state. The irreversible evolution of leakage current starting at a certain drain voltage has been taken as a criterion for the onset of device degradation. It has been stated that there is a stability limit for VDS depending on the epitaxial design. It has been found that wafers with GaN cap show much higher critical voltages as compared to non-capped epitaxial designs. Electroluminescence measurements have been performed to localize defects after DC-Step-Stress-Tests up to 80V for wafer without GaN cap and 120V for wafer with GaN cap.

Systematic Characterization of Integrated Circuit Standard Components as Stimulated by Scanning Laser Beam

Laser stimulation (LS) has become a common technique of failure localization in integrated circuits (ICs). In optical-beam-induced resistivity change, thermally induced voltage alteration, Seebeck effect imaging, soft defect localization, etc., device modules with special passive and active device properties are the subject of stimulation effects. This paper investigates in detail the behavior and equivalent circuit models of most commonly used IC components, passives such as metal and polysilicon interconnect resistors and thermoelectric junctions, and actives like p-n diodes and field-effect transistors under illumination from both chip frontside and backside. The systematic characterization of the results improves the evaluation of LS analysis in failing circuits.

Investigation of Laser Voltage Probing Signals in CMOS Transistors

The increasing number of interconnection layers is making failure analysis of integrated circuits (ICs) increasingly complex. In addition, the decreasing supply voltage is a challenge for failure analysis equipment, as minimum detection levels are reached. Laser voltage probing (LVP) is a common method for probing internal nodes through the silicon back side, and is particularly suited to low-voltage measurements. However, to date there has been little work on detailed understanding of the physical origin of LVP signals. This article presents measurements of LVP signal strength on large test structures over a wide range of parameters as a first approach to detailed understanding of LVP physics and future scaling. All the measurements we present were performed using a continuous-wave 1319 nm laser. In addition to the usual time-domain LVP measurements, the authors demonstrate rapid data acquisition scheme using frequency-domain measurements. This method allows rapid voltage sweeps and also allows for (x, y) mapping of signal strength across device structures. The signal strengths are in accord with qualitative models.

Thermal Laser Stimulation of active devices in silicon - a quantitative FET parameter investigation

Thermal Laser Stimulation (TLS) can localize also silicon device anomalies using free carrier absorption in heavily doped areas. We present frontside and backside results on the quantitative influence of TLS on FET parameters. We show how the FET output curve shifts as function of laser power and scanning speed. This work investigates the quantitative influence of frontside and backside TLS on FET device parameters. The influence of temperature on device characteristics has been investigated in detail and used as standard. As a result, the TLS temperature shift can be calculated and the correlating device parameters can be obtained. Based on this study, the detectability of defects with TLS or SDL can be estimated much more accurate.

Bio-Nano-Composite Materials Constructed With Single Cells and Carbon Nanotubes: Mechanical, Electrical, and Optical Properties

Here, we report a procedure to obtain novel artificial materials using either fungal or isolated tobacco cells in association with different percentages of carbon nanotubes. The electrical, mechanical, and optical properties of these materials have been determined. The produced bio-nano-composite materials have linear electrical characteristics, high temperature stability up to 180 °C, linear increase of the electrical conductivity with increasing temperature and, in one case, also optical transparency. Using tobacco cells, we obtained a material with low mass density and mechanical properties suitable for structural applications along with high electrical conductivity. We also present theoretical models both for their mechanical and electrical behavior. These findings report a procedure for the next generation bio-nano-composite materials.