Christoph Dr. Kleint

Semiconductor memory with vertical charge-trapping memory cells and fabrication

SONOS memory cells and arrays and method of forming the same

Method for fabricating an NROM memory cell array

Method for fabricating semiconductor memories with charge trapping memory cells

Method for fabricating an NROM memory cell arrangement

Trench transistor for a storage cell comprises a trench with vertical side walls, a thin dielectric layer, and oxide layers on semiconductor material arranged on base of the trench and/or on part of the upper side of semiconductor body

Method for fabricating NROM memory cells with trench transistors

Method for the production of a nrom memory cell field

Method for the production of sonos memory cells, sonos memory cell, and memory cell field

Verfahren zur Herstellung eines Halbleiterspeichers mit Charge-Trapping-Speicherzellen und Halbleitersubstrat