Christophe Allebe

Realization of GaInP/Si Dual-Junction Solar Cells With 29.8% 1-Sun Efficiency

Combining a Si solar cell with a high-bandgap top cell reduces the thermalization losses in the short wavelength and enables theoretical 1-sun efficiencies far over 30%. We have investigated the fabrication and optimization of Si-based tandem solar cells with 1.8-eV rear-heterojunction GaInP top cells. The III–V and Si heterojunction subcells were fabricated separately and joined by mechanical stacking using electrically insulating optically transparent interlayers. Our GaInP/Si dual-junction solar cells have achieved a certified cumulative 1-sun efficiency of 29.8% ± 0.6% (AM1.5g) in four-terminal operation conditions, which exceeds the record 1-sun efficiencies achieved with both III–V and Si single-junction solar cells. The effect of luminescent coupling between the subcells has been investigated, and optical losses in the solar cell structure have been addressed.

Silicon-Rich Silicon Carbide Hole-Selective Rear Contacts for Crystalline-Silicon-Based Solar Cells

The use of passivating contacts compatible with typical homojunction thermal processes is one of the most promising approaches to realizing high-efficiency silicon solar cells. In this work, we investigate an alternative rear-passivating contact targeting facile implementation to industrial p-type solar cells. The contact structure consists of a chemically grown thin silicon oxide layer, which is capped with a boron-doped silicon-rich silicon carbide [SiCx(p)] layer and then annealed at 800-900 °C. Transmission electron microscopy reveals that the thin chemical oxide layer disappears upon thermal annealing up to 900 °C, leading to degraded surface passivation. We interpret this in terms of a chemical reaction between carbon atoms in the SiCx(p) layer and the adjacent chemical oxide layer. To prevent this reaction, an intrinsic silicon interlayer was introduced between the chemical oxide and the SiCx(p) layer. We show that this intrinsic silicon interlayer is beneficial for surface passivation. Optimized passivation is obtained with a 10-nm-thick intrinsic silicon interlayer, yielding an emitter saturation current density of 17 fA cm-2 on p-type wafers, which translates into an implied open-circuit voltage of 708 mV. The potential of the developed contact at the rear side is further investigated by realizing a proof-of-concept hybrid solar cell, featuring a heterojunction front-side contact made of intrinsic amorphous silicon and phosphorus-doped amorphous silicon. Even though the presented cells are limited by front-side reflection and front-side parasitic absorption, the obtained cell with a Voc of 694.7 mV, a FF of 79.1%, and an efficiency of 20.44% demonstrates the potential of the p+/p-wafer full-side-passivated rear-side scheme shown here.

Impact of Rear-Surface Passivation on MWT Performances

Back-contact metal-wrap-through (MWT) solar cells are very attractive for implementation into industrial production lines. They combine the advantages of back-contact cells and the potential of easy integration into the production lines of standard cells. Nonetheless, they tend to show lower fill factors and open-circuit voltages than conventional cells. This is attributed to a non-linear shunt behavior under the emitter busbars and is believed to arise from a too-deep penetration of the silver paste printed on the emitter region on the rear during the firing step. In order to improve the MWT solar cells performances, we propose to deposit on the rear-surface a full coverage layer of a dielectric material. This layer is used first to protect the emitter during the firing step; but if it is smartly chosen, it can also be used as passivating layer for the base surface. In this work, we have processed 12.5times12.5 cm2 mc-Si wafers into 220-mum-thick MWT cells, including the deposition of a passivating dielectric layer on the rear surface. By means of dark lock-in thermography measurements, we observe that the shunting effect in the resulting cells is greatly reduced compared to neighboring cells processed into MWT with an Al-BSF rear-surface passivation. The dielectric plays in addition its role of surface passivation, according to the nearly 7 mV increase observed on the open-circuit voltage even on thick wafers. We also observe a 1.4% FF absolute increase, resulting in a 0.6% absolute efficiency increase

Development of RTP for industrial solar cell processing

Rapid Thermal Processing (RTP), originally developed for processing microelectronic devices has been investigated in the recent decade for its potential in the production of Si solar cells. This paper will discuss the use of RTP for industrial Si solar cells with screen-printed contacts. Printed metal contacts require adapted emitters when good fill factors should be achieved. Multi-crystalline Si substrates require to adapt the temperature ramps of RTP to avoid minority carrier lifetime degradation from activated defect centres. Finally, industrial processing requires high throughput that cannot be achieved with conventional RTP equipment. This paper will present an advanced selective emitter process and a recently developed continuous RTP system that meet for the first time the requirements to make RTP compatible with industrial solar cell processing. The limits of industrial RTP solar cell processing will be discussed.

Laser ablation and contact formation for Cu-plated large area C-silicon industrial solar cells

In this work we demonstrate the successful implementation of laser ablation of SiNx ARC to contact high ohmic emitters up to 120 Ω/sq with an advanced metallization on large area substrates. We propose Suns-Voc measurements as a fast and effective method to characterize the potential laser damage. We look at the laser ablation factors that can compromise the solar cell performance and we see how to limit the damage that can jeopardize the device performance. We define the laser ablation process window for emitters of different resistivity ranging from a typical 60 Ω/sq emitter to a emitter of 140 Ω/sq. A point-contact contacting scheme is proposed that leads to an improved Voc of the solar cell. Finally we present results of the electrical characterization of large area solar cells. Efficiencies up to 18.7% are obtained on large area, 160 µm thick CZ silicon substrates.

Boosting the efficiency of III-V/Si tandem solar cells

We have developed Si-based tandem solar cells with a certified 1-sun efficiency of 29.8% (AM1.5g). The four-terminal tandem devices consist of 1.8 eV rear-heterojunction GaInP top cells and silicon heterojunction bottom cells. The two subcells were fabricated independently in two different labs and merged using an optically transparent, electrically insulating epoxy. Work is ongoing to further improve the performance of each subcell and to push the tandem cell efficiency to > 30%.

High-performance hetero-junction crystalline silicon photovoltaic technology

Silicon heterojunction solar cell technology (HJT) takes advantage of ultra-thin amorphous silicon layers deposited on both sides of monocrystalline silicon wafers, enabling excellent silicon wafer surface passivation resulting in high device power output and in addition to efficient use of thin wafers. A full cell processing platform was developed in our laboratory, enabling to achieve > 22 % cell efficiency. Advanced concepts for metallization and interconnection are under study, from fine-line printing combined with SmartWire interconnection to Copper plating. Importantly, we show that the HJT technology intrinsically enables high bifaciality of the cells (> 95 %), and further demonstrates a low thermal coefficient (<; 0.2 - 0.3 %/°C). The high performance of heterojunction cells and SmartWire interconnection based modules allow for very low cost of electricity for Heterojunction based solar systems, with a potential below 6 Euro cents per kWh in Europe, bringing photovoltaics as a very competitive electricity source. It further provides upgrade potential towards 24 % cell efficiency.

Selective junction separation techniques for multi-crystalline silicon solar cells

This paper addresses the need for new junction separation techniques that are low-cost, selective, have a high throughput and high-yield. Pre- as well as post-diffusion selective approaches as integrated into an existing low cost screenprinted metallisation processing scheme are discussed and compared to state-of-the-art technology.

Passivating contacts for silicon solar cells with 800 °C stability based on tunnel-oxide and highly crystalline thin silicon layer

Passivating contacts based on nanostructured highly crystalline thin silicon layers are presented. The contact layer stack is optimized towards full crystallinity targeting high transparency. We present an optimization of an electron selective contact and demonstrate excellent surface passivation on n-type and also p-type wafers with such highly crystalline layers. On n-type wafers, the electron selective contact attains an implied open-circuit voltage of 718 mV at an annealing temperature of 925°C. For p-type wafers we find optimum conditions between 850°C and 900°C attaining an implied open-circuit voltage of 723 mV. First tests with hole-selective contacts have yielded an implied open-circuit voltage of up to 676 mV after thermal annealing at 800°C.

Metal-free crystalline silicon solar cells in module

Solar cells interconnection with multiple wires enables the module integration of metal-free silicon heterojunction (SHJ) solar cells. The electrical contact occurs between the transparent conductive oxide (TCO) of the SHJ cell and the low melting point alloy coated on the wires. First proof-of-concept bifacial modules are presented. The module efficiency drop between standard SHJ silver screen-printed cells and metal-free SHJ cell is only 0.5% abs. This drop is related to the high contact resistance at the non-yet optimized TCO/wire interface, higher than typical TCO/silver finger contact resistance.