Gizem Nogay

Nanocrystalline Silicon Carrier Collectors for Silicon Heterojunction Solar Cells and Impact on Low-Temperature Device Characteristics

Silicon heterojunction solar cells typically use stacks of hydrogenated intrinsic/doped amorphous silicon layers as carrier selective contacts. However, the use of these layers may cause parasitic optical absorption losses and moderate fill factor (FF) values due to a high contact resistivity. In this study, we show that the replacement of doped amorphous silicon with nanocrystalline silicon is beneficial for device performance. Optically, we observe an improved short-circuit current density when these layers are applied to the front side of the device. Electrically, we observe a lower contact resistivity, as well as higher FF. Importantly, our cell parameter analysis, performed in a temperature range from -100 to +80 °C, reveals that the use of hole-collecting p-type nanocrystalline layer suppresses the carrier transport barrier, maintaining FF s in the range of 70% at -100 °C, whereas it drops to 40% for standard amorphous doped layers. The same analysis also reveals a saturation onset of the open-circuit voltage at -100 °C using doped nanocrystalline layers, compared with saturation onset at -60 °C for doped amorphous layers. These findings hint at a reduced importance of the parasitic Schottky barrier at the interface between the transparent electrodes and the selective contact in the case of nanocrystalline layer implementation.

Silicon-Rich Silicon Carbide Hole-Selective Rear Contacts for Crystalline-Silicon-Based Solar Cells

The use of passivating contacts compatible with typical homojunction thermal processes is one of the most promising approaches to realizing high-efficiency silicon solar cells. In this work, we investigate an alternative rear-passivating contact targeting facile implementation to industrial p-type solar cells. The contact structure consists of a chemically grown thin silicon oxide layer, which is capped with a boron-doped silicon-rich silicon carbide [SiCx(p)] layer and then annealed at 800-900 °C. Transmission electron microscopy reveals that the thin chemical oxide layer disappears upon thermal annealing up to 900 °C, leading to degraded surface passivation. We interpret this in terms of a chemical reaction between carbon atoms in the SiCx(p) layer and the adjacent chemical oxide layer. To prevent this reaction, an intrinsic silicon interlayer was introduced between the chemical oxide and the SiCx(p) layer. We show that this intrinsic silicon interlayer is beneficial for surface passivation. Optimized passivation is obtained with a 10-nm-thick intrinsic silicon interlayer, yielding an emitter saturation current density of 17 fA cm-2 on p-type wafers, which translates into an implied open-circuit voltage of 708 mV. The potential of the developed contact at the rear side is further investigated by realizing a proof-of-concept hybrid solar cell, featuring a heterojunction front-side contact made of intrinsic amorphous silicon and phosphorus-doped amorphous silicon. Even though the presented cells are limited by front-side reflection and front-side parasitic absorption, the obtained cell with a Voc of 694.7 mV, a FF of 79.1%, and an efficiency of 20.44% demonstrates the potential of the p+/p-wafer full-side-passivated rear-side scheme shown here.

Passivating contacts for silicon solar cells with 800 °C stability based on tunnel-oxide and highly crystalline thin silicon layer

Passivating contacts based on nanostructured highly crystalline thin silicon layers are presented. The contact layer stack is optimized towards full crystallinity targeting high transparency. We present an optimization of an electron selective contact and demonstrate excellent surface passivation on n-type and also p-type wafers with such highly crystalline layers. On n-type wafers, the electron selective contact attains an implied open-circuit voltage of 718 mV at an annealing temperature of 925°C. For p-type wafers we find optimum conditions between 850°C and 900°C attaining an implied open-circuit voltage of 723 mV. First tests with hole-selective contacts have yielded an implied open-circuit voltage of up to 676 mV after thermal annealing at 800°C.