Christopher L. Borst

Pad porosity, compressibility and slurry delivery effects in chemical- mechanical planarization: modeling and experiments

A chemical-mechanical planarization (CMP) model based on lubrication theory is developed which accounts for pad compressibility, pad porosity and means of slurry delivery. Slurry film thickness and velocity distributions between the pad and the wafer are predicted using the model. Two regimes of CMP operation are described: the lubrication regime (for ,40‐70 mm slurry film thickness) and the contact regime (for thinner films). These regimes are identified for two different pads using experimental copper CMP data and the predictions of the model. The removal rate correlation based on lubrication and mass transport theory agrees well with our experimental data in the lubrication regime. q 2000 Elsevier Science S.A. All rights reserved.

Three-Dimensional Chemical Mechanical Planarization Slurry Flow Model Based on Lubrication Theory

A three-dimensional chemical mechanical planarization slurry flow model based upon lubrication theory is developed, utilizing a generalized Reynolds equation that includes pad porosity and bending. The model is used to calculate slurry film thickness and slurry velocity distributions between the wafer and pad, with the minimum slurry film thickness determining the degree of contact between the wafer and pad. The dependence of the removal rate of copper films as a function of applied pressure and velocity agrees well with model predictions. The minimum slurry film thickness is examined over a range of input variables, namely, applied pressure, wafer-pad velocity, wafer radius and curvature, slurry viscosity, and pad porosity and compressibility.

Chemical Mechanical Polishing Mechanisms of Low Dielectric Constant Polymers in Copper Slurries

Chemical mechanical polishing (CMP) of bis-benzocyclobutene ,a (BCB) and silicon-application low-κ (SiLK ,a ) polymers in slurries commonly used for copper removal is studied. Material removal rates were determined for a variety of conditions, with surface roughness measured after polishing by atomic force microscopy. BCB exhibited removal rates of 10-50 nm/min and roughness of 0.5 - 1.4 nm, while SiLK exhibited removal rates of 20-300 nm/min and roughness of 0.8 to 2.0 nm. X-ray photoelectron spectroscopy measurements on BCB showed an increase in surface oxygen to 14% after CMP, compared to a bulk concentration of 3.5%. Similarly, SiLK surface oxygen increased to 12% after CMP, compared to near zero in the bulk. A physically based model for polymer CMP is proposed. The model describes chemical and surfactant diffusion, surfactant adsorption, surface reactions, and surface abrasion during polishing. Two cases for the chemical action of the slurries are described by two different removal mechanisms. Case I describes slurry that does not react with polymer structural bonds. Instead, slurry oxidizes the polymer surface layer, deterring physical damage and CMP removal. Case II describes slurry that reacts with polymer structural bonds, forming a weakened layer that is removed rapidly during CMP.

Surface Kinetics Model for SiLK Chemical Mechanical Polishing

The surface mechanism for SILK removal by chemical mechanical polishing (CMP) is modeled quantitatively using modified Langmuir-Hinshelwood surface reaction kinetics to define the boundary condition on the wafer surface for three-dimensional diffusive mass-transport equations. The model generates slurry concentration distributions between the pad and wafer as well as a CMP removal rate profile along the wafer diameter. Mathematically predicted removal rates of 15-200 nm/min accurately represent experimental data for concentrations of 0.0015-0.024 M potassium-hydrogen phthalate slurry. Three-dimensional model fits to experimental data for a range of velocity and pressure indicate that the SILK CMP removal rate is controlled by a combination of (i) chemical reaction altering the SILK surface layer and (ii) physically enhanced desorption of the reacted surface layer into the surrounding slurry.

Chemical–mechanical polishing of SiOC organosilicate glasses: the effect of film carbon content

Abstract The effects of slurry chemistry and film properties on the chemical–mechanical polishing (CMP) of three organosilicate glasses (SiOC) were used to develop an understanding of the removal mechanism during SiOC CMP. The SiOC removal rate varied from 40 to 80 nm/min in slurries commonly used to polish silicon dioxide, with the removal rate increasing as the SiOC film carbon content decreased and the slurry pH increased. Film carbon content had the largest impact on CMP, due to its effect on film hydrophobicity and suppression of slurry chemical attack. SiOC surface roughness after CMP was as low as 0.15 nm at a slurry pH of 10.8 and 0.41 nm at a slurry pH of 6.0. Surface and bulk chemical measurements show that chemical reactions with the slurry during CMP occur only at the polymer surface and do not penetrate into the bulk of the films. Experimental results are compared to the CMP of SiLK 1 ‘silicon applications low-κ’ microelectronics resin, a polymer with a comparable dielectric constant, and, to a lesser degree, with silicon dioxide. A mechanism for the CMP of SiOC films in silicon dioxide polishing slurries is proposed that includes the effects of slurry chemistry and film properties.

VLSI processed InGaAs on Si MOSFETs with thermally stable, self-aligned Ni-InGaAs contacts achieving: Enhanced drive current and pathway towards a unified contact module

Parasitic resistance (Rpara) is a grand challenge to successfully hetero-integrate III-V channels onto Si for CMOS application. Here, we report the first statistical IDsat comparison for non-self-aligned and self-aligned contacts of In0.53Ga0.47As MOSFETs fabricated on large scale Si substrates with VLSI toolsets. We compare non-self-aligned Mo and self-aligned Ni-InGaAs contacts. Devices with self-aligned contacts exhibit a 25% enhancement in IDsat over devices with non-self-aligned contacts largely due to the 27% reduction in Rpara. We have also extended the thermal stability of Ni-InGaAs to 500 °C (highest reported) enabling it to be compatible with BEOL processes. The impact of the Ni-InGaAs process module on tool contamination is discussed. These results represent significant progress towards establishing a path to a unified Ni-based S/D contact module for Si/SiGe/Ge/III-V co-integration on VLSI platforms.

Double patterning combined with shrink technique to extend ArF lithography for contact holes to 22nm node and beyond

Lithography becomes much more challenging when CD shrinks to 22nm nodes. Since EUV is not ready, double patterning combined with Resolution Enhancement Technology (RET) such as shrink techniques seems to be the most possible solution. Companies such as TSMC[1] and IBM[2] etc. are pushing out EUV to extend immersion ArF lithography to 32nm/22nm nodes. Last year, we presented our development work on 32nm node contact (50nm hole at 100nm pitch) using dry ArF lithography by double patterning with SAFIER shrink process[3]. To continue the work, we further extend our dry litho capability towards the 22nm node. We demonstrated double patterning capability of 40nm holes at 80nm pitch using ASML XT1400E scanner. It seems difficult to print pitches below 140nm on dry scanner in single exposure which is transferred into 70nm pitch with double patterning. To push the resolution to 22nm node and beyond, we developed ArF immersion process on ASML XT1700i-P system at the College of Nanoscale Science and Engineering (Albany, NY) combined with a SAFIER process. We achieved single exposure process capability of 25nm holes at 128nm pitch after shrink. It enables us to print ~25nm holes at pitch of 64nm with double patterning. Two types of hard mask (HM), i.e. TIN and a-Si were used in both dry and immersion ArF DP processes. The double patterning process consists of two HM litho-shrink-etch steps. The dense feature is designed into two complementary parts on two masks such that the density is reduced by half and minimum pitch is increased by at least a factor of 21/2 depending on design. The complete pattern is formed after the two HM litho-shrink-etch steps are finished.

Chip-Scale Modeling of Electroplated Copper Surface Profiles

In this paper, a methodology for the characterization and modeling of pattern-dependent problems in copper interconnect topography is presented. For the electroplating process, the methodology consists of test structure and mask design to examine feature scale copper step height and the height of copper array regions as a function of underlying layout parameters. Semiempirical response surface models are then generated with model parameters extracted from conventional and superfill plating processes. Once the models are calibrated, layout parameters including pattern density, linewidth distributions, and line length are extracted for each cell in a 40 X 40 μm discretization of any random chip layout. Then, a chip-scale prediction is achieved by simulating generalized average heights for each grid cell across the entire chip. The prediction result shows root mean square errors of less than 1000 A for array height and around 500 A for step height. This methodology provides the first known chip-scale prediction of electroplated topography.

Study of millisecond laser annealing on recrystallization, activation, and mobility of laser annealed SOI doped via arsenic ion implantation

Millisecond anneal techniques have been demonstrated to achieve fully recrystallized, highly activated, shallow, and abrupt junctions in silicon with both p- and n-type dopants due to the techniques fast time scale and high temperature. To understand and model the effects of millisecond laser annealing, knowledge of the true thermal profile experienced by the active semiconductor region must be known. This work simulates the impacts of a scanning laser in a series of shallow implants, and compares those results to experimental results. Arsenic ion (As+) implant energies of 10, 19, and 25 keV at doses of 1.5 × 1015 and 3 × 1015 cm−2 into a silicon-on-insulator substrate are studied to achieve different doping levels and amorphization depths. The recrystallization, activation, and mobility of the laser annealed, ion implanted experimental cells are then analyzed. For each experiment, Sentaurus technology computer aided design is used to create a calibrated 2D laser model to approximate the thermal budget of the lasing recipes (850–1250 °C) then using that output as an input into lattice kinetic Monte Carlo (LKMC) to simulate the solid phase epitaxial regrowth (SPER) during anneal of the various implant conditions. Sheet resistance and Hall effect measurements were used to correlate dopant activation and mobility with the regrowth process during laser anneal, showing the onset of high conductivity associated with completion of SPER in the films. The LKMC model shows an excellent agreement with cross section transmission electron microscopy, correlating the increase of conductivity with completion of crystal regrowth, increased activation, and crystal quality at various temperatures. Shallow, lower dose implants are capable of single crystal regrowth, producing high levels of activation >1 × 1020 cm−2 and nominal mobilities for highly arsenic-doped silicon. However, higher energy implants that fully amorphize the film regrow polycrystalline silicon with low mobilities even at very high temperatures (1250 °C), unsuitable for source–drain formation in logic devices.

Opportunities and challenges of the 450mm transition

A close collaboration among IC makers, equipment and material suppliers, facility, and automation providers resulted in better alignment in the technology roadmap and lower development costs for tools and wafers. This would enable the cost-effective operation of future 450mm HVM fabs. The 450mm transition will certainly create another prosperous opportunity for the semiconductor industry.