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Dive into the research topics where Chun-Hsiung Lin is active.

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Featured researches published by Chun-Hsiung Lin.


Applied Physics Express | 2014

Low interface trap density Al2O3/In0.53Ga0.47As MOS capacitor fabricated on MOCVD-grown InGaAs epitaxial layer on Si substrate

Yueh-Chin Lin; Mao-Lin Huang; Chen-Yu Chen; Meng-Ku Chen; Hung-Ta Lin; Pang-Yan Tsai; Chun-Hsiung Lin; Hui-Cheng Chang; Tze-Liang Lee; Chia-Chiung Lo; Syun-Ming Jang; Carlos H. Diaz; He-Yong Hwang; Yuan-Chen Sun; Edward Yi Chang

A low interface trap density (Dit) Al2O3/In0.53Ga0.47As/Si MOS capacitor fabricated on an In0.53Ga0.47As heterostructure layer directly grown on a 300 mm on-axis Si(100) substrate by MOCVD with a very thin buffer layer is demonstrated. Compared with the MOS capacitors fabricated on the In0.53Ga0.47As layer grown on the lattice-matched InP substrate, the Al2O3/In0.53Ga0.47As MOS capacitors fabricated on the Si substrate exhibit excellent capacitance–voltage characteristics with a small frequency dispersion of approximately 2.5%/decade and a low interface trap density Dit close to 5.5 × 1011 cm−2 eV−1. The results indicate the potential of integrating high-mobility InGaAs-based materials on a 300 mm Si wafer for post-CMOS device application in the future.


symposium on vlsi technology | 2015

In 0.53 Ga 0.47 As MOSFETs with high channel mobility and gate stack quality fabricated on 300 mm Si substrate

Mao-Lin Huang; S. W. Chang; Meng-Ku Chen; C. H. Fan; Hau-Yu Lin; Chun-Hsiung Lin; R. L. Chu; K. Y. Lee; M. A. Khaderbad; Z. C. Chen; Chao-Cheng Chen; L. T. Lin; Hung-Ta Lin; Hui-Cheng Chang; Chang-Ta Yang; Ying-Keung Leung; Yee-Chia Yeo; Syun-Ming Jang; H. Y. Hwang; Carlos H. Diaz

In<sub>0.53</sub>Ga<sub>0.47</sub>As channel MOSFETs were fabricated on 300 mm Si substrate. The epitaxial In<sub>0.53</sub>Ga<sub>0.47</sub>As channel layer exhibits high Hall electron mobility comparable to those grown on lattice matched InP substrates. Excellent device characteristics (SS~95 mV/dec., I<sub>on</sub>/I<sub>off</sub> ~10<sup>5</sup>, DIBL ~51 mV/V at V<sub>ds</sub> = 0.5V for L<sub>g</sub>=150 nm device) with good uniformity across the wafer were demonstrated. The extracted high field effect mobility (μ<sub>EF</sub> = 1837 cm<sup>2</sup>/V-s with EOT ~ 0.9 nm) is among the highest values reported for surface channel In<sub>0.53</sub>Ga<sub>0.47</sub>As MOSFETs.


IEEE Transactions on Electron Devices | 2013

Electrical Characteristics of MOSCAPs and the Effect of Postdeposition Annealing Temperatures

Hai Dang Trinh; Yueh Chin Lin; Edward Yi Chang; Ching-Ting Lee; Shin-Yuan Wang; Hong Quan Nguyen; Yu Sheng Chiu; Quang Ho Luc; Hui-Chen Chang; Chun-Hsiung Lin; Simon Jang; Carlos H. Diaz

The characteristics of Al2O3/InSb MOSCAPs processed with different postdeposition annealing (PDA) temperatures are investigated. X-ray photoelectron spectroscopy analysis shows a significant reduction of InSb-oxides after HCl plus trimethyl aluminum treatment and oxide deposition. Multifrequency capacitance-voltage (C-V) characteristics exhibit low-frequency and asymmetrical C-V behaviors, in which capacitance in the InSb conduction band side is lower than in the valence band side. The electrical properties of the MOSCAPs are sensitive to PDA temperature and degraded significantly at PDA temperature >300 °C. This degradation is closely related to the diffusion of In, Sb into Al2O3 as indicated by transmission electron microscopy analyses.


symposium on vlsi technology | 2016

High performance In 0.53 Ga 0.47 As FinFETs fabricated on 300 mm Si substrate

Mao-Lin Huang; S. W. Chang; Meng-Ku Chen; Y. Oniki; Hsien-Wei Chen; Chun-Hsiung Lin; Wen-Chin Lee; M. A. Khaderbad; K. Y. Lee; Z. C. Chen; P. Y. Tsai; L. T. Lin; M. H. Tsai; C. L. Hung; Tsung-Yi Huang; Yi-Hsiung Lin; Yee-Chia Yeo; Syun-Ming Jang; H. Y. Hwang; Howard Chih-Hao Wang; Carlos H. Diaz

In<sub>0.53</sub>Ga<sub>0.47</sub>As FinFETs are fabricated on 300 mm Si substrate. High device performance with good uniformity across the wafer are demonstrated (SS=78 mV/dec., I<sub>on</sub>/I<sub>off</sub>~10<sup>5</sup>, DIBL=48 mV/V, g<sub>m</sub>=1510 μS/μm, and I<sub>on</sub>=301 μA/μm at V<sub>ds</sub>=0.5V with L<sub>g</sub>=120 nm device). The extrinsic field effect mobility of 1731 cm<sup>2</sup>/V-s with EOT~0.9nm is extracted by split-CV. Devices fabricated on 300mm Si have shown similar performances in SS and I<sub>on</sub> when benchmarked with device fabricated on lattice-matched InP substrate. In addition, an I<sub>on</sub> of 44.1 μA per fin is observed on the fin-height of 70 nm and the fin-width of 25nm, which is among the highest values reported for In<sub>0.53</sub>Ga<sub>0.47</sub>As FinFETs to the best of our knowledge.


IEEE Transactions on Electron Devices | 2013

Electrical Characteristics of

Hai Dang Trinh; Yueh Chin Lin; Edward Yi Chang; Ching-Ting Lee; Shin-Yuan Wang; Hong Quan Nguyen; Yu Sheng Chiu; Quang Ho Luc; Hui-Chen Chang; Chun-Hsiung Lin; Simon Jang; Carlos H. Diaz

The characteristics of Al2O3/InSb MOSCAPs processed with different postdeposition annealing (PDA) temperatures are investigated. X-ray photoelectron spectroscopy analysis shows a significant reduction of InSb-oxides after HCl plus trimethyl aluminum treatment and oxide deposition. Multifrequency capacitance-voltage (C-V) characteristics exhibit low-frequency and asymmetrical C-V behaviors, in which capacitance in the InSb conduction band side is lower than in the valence band side. The electrical properties of the MOSCAPs are sensitive to PDA temperature and degraded significantly at PDA temperature >300 °C. This degradation is closely related to the diffusion of In, Sb into Al2O3 as indicated by transmission electron microscopy analyses.


Archive | 2015

{\rm Al}_{2}{\rm O}_{3}/{\rm InSb}

Chien-Hsun Wang; Mao-Lin Huang; Chun-Hsiung Lin; Jean-Pierre Colinge


Archive | 2017

MOSCAPs and the Effect of Postdeposition Annealing Temperatures

Chun-Hsiung Lin; Chung-Cheng Wu; Carlos H. Diaz; Chih-Hao Wang; Wen-Hsing Hsieh; Yi-Ming Sheu


Archive | 2015

NANOWIRE MOSFET WITH SUPPORT STRUCTURES FOR SOURCE AND DRAIN

Carlos H. Diaz; Chung-Cheng Wu; Chia-Hao Chang; Chih-Hao Wang; Jean-Pierre Colinge; Chun-Hsiung Lin; Wai-Yi Lien; Ying-Keung Leung


Archive | 2014

Horizontal Gate-All-Around Device Having Wrapped-Around Source and Drain

Carlos H. Diaz; Chun-Hsiung Lin; Hui-Cheng Chang; Syun-Ming Jang; Chien-Hsun Wang; Mao-Lin Huang


Archive | 2013

Contacts For Highly Scaled Transistors

Li-Ting Wang; Teng-Chun Tsai; Chun-Hsiung Lin; Cheng-Tung Lin; Chi-Yuan Chen; Kuo-Yin Lin; Wan-Chun Pan; Ming-Liang Yen; Hui-Cheng Chang

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