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Dive into the research topics where Hung-Ta Lin is active.

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Featured researches published by Hung-Ta Lin.


Applied Physics Express | 2014

Low interface trap density Al2O3/In0.53Ga0.47As MOS capacitor fabricated on MOCVD-grown InGaAs epitaxial layer on Si substrate

Yueh-Chin Lin; Mao-Lin Huang; Chen-Yu Chen; Meng-Ku Chen; Hung-Ta Lin; Pang-Yan Tsai; Chun-Hsiung Lin; Hui-Cheng Chang; Tze-Liang Lee; Chia-Chiung Lo; Syun-Ming Jang; Carlos H. Diaz; He-Yong Hwang; Yuan-Chen Sun; Edward Yi Chang

A low interface trap density (Dit) Al2O3/In0.53Ga0.47As/Si MOS capacitor fabricated on an In0.53Ga0.47As heterostructure layer directly grown on a 300 mm on-axis Si(100) substrate by MOCVD with a very thin buffer layer is demonstrated. Compared with the MOS capacitors fabricated on the In0.53Ga0.47As layer grown on the lattice-matched InP substrate, the Al2O3/In0.53Ga0.47As MOS capacitors fabricated on the Si substrate exhibit excellent capacitance–voltage characteristics with a small frequency dispersion of approximately 2.5%/decade and a low interface trap density Dit close to 5.5 × 1011 cm−2 eV−1. The results indicate the potential of integrating high-mobility InGaAs-based materials on a 300 mm Si wafer for post-CMOS device application in the future.


symposium on vlsi technology | 2015

In 0.53 Ga 0.47 As MOSFETs with high channel mobility and gate stack quality fabricated on 300 mm Si substrate

Mao-Lin Huang; S. W. Chang; Meng-Ku Chen; C. H. Fan; Hau-Yu Lin; Chun-Hsiung Lin; R. L. Chu; K. Y. Lee; M. A. Khaderbad; Z. C. Chen; Chao-Cheng Chen; L. T. Lin; Hung-Ta Lin; Hui-Cheng Chang; Chang-Ta Yang; Ying-Keung Leung; Yee-Chia Yeo; Syun-Ming Jang; H. Y. Hwang; Carlos H. Diaz

In<sub>0.53</sub>Ga<sub>0.47</sub>As channel MOSFETs were fabricated on 300 mm Si substrate. The epitaxial In<sub>0.53</sub>Ga<sub>0.47</sub>As channel layer exhibits high Hall electron mobility comparable to those grown on lattice matched InP substrates. Excellent device characteristics (SS~95 mV/dec., I<sub>on</sub>/I<sub>off</sub> ~10<sup>5</sup>, DIBL ~51 mV/V at V<sub>ds</sub> = 0.5V for L<sub>g</sub>=150 nm device) with good uniformity across the wafer were demonstrated. The extracted high field effect mobility (μ<sub>EF</sub> = 1837 cm<sup>2</sup>/V-s with EOT ~ 0.9 nm) is among the highest values reported for surface channel In<sub>0.53</sub>Ga<sub>0.47</sub>As MOSFETs.


Archive | 2015

SYSTEMS AND METHODS FOR FABRICATING VERTICAL-GATE-ALL-AROUND DEVICES

Cheng-Tung Lin; Teng-Chun Tsai; Li-Ting Wang; De-Fang Chen; Chih-tang Peng; Hung-Ta Lin; Chien-Hsun Wang; Huang-Yi Huang


Archive | 2015

Epitaxial Structures and Methods of Forming the Same

Meng-Ku Chen; Hung-Ta Lin; Pang-Yen Tsai; Hui-Cheng Chang


Archive | 2015

Tunnel field-effect transistor and method for fabrictaing the same

Teng-Chun Tsai; Cheng-Tung Lin; Li-Ting Wang; Chih-tang Peng; De-Fang Chen; Hung-Ta Lin; Chien-Hsun Wang


Archive | 2015

TUNNEL FIELD-EFFECT TRANSISTOR AND METHOD FOR FABRICATING THE SAME

Teng-Chun Tsai; Li-Ting Wang; Cheng-Tung Lin; De-Fang Chen; Chih-tang Peng; Chien-Hsun Wang; Hung-Ta Lin


Archive | 2014

CONTACTS FOR TRANSISTORS

Li-Ting Wang; Teng-Chun Tsai; Cheng-Tung Lin; Hung-Ta Lin; Hui-Cheng Chang


Archive | 2015

Double stepped semiconductor substrate

Meng-Ku Chen; Hung-Ta Lin; Hui-Cheng Chang


Archive | 2013

DELTA DOPING LAYER IN MOSFET SOURCE/DRAIN REGION

Hung-Ta Lin; Mao-Lin Huang; Li-Ting Wang; Chien-Hsun Wang; Meng-Ku Chen; Chun-Hsiung Lin; Pang-Yen Tsai; Hui-Cheng Chang


Archive | 2016

Vertical-gate-all-around devices and method of fabrication thereof

Cheng-Tung Lin; Teng-Chun Tsai; Li-Ting Wang; De-Fang Chen; Chih-tang Peng; Hung-Ta Lin; Chien-Hsun Wang; Huang-Yi Huang

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