Chung-Yen Hsu

Thermal conductivity of Si/SiGe superlattice films

We have evaluated the thermal conductivity of Si/SiGe superlattice films by theoretical analysis and experiment. In experiments, the ultrahigh vacuum chemical vapor deposition is employed to form the Si/Si0.71Ge0.29 and Si/Si0.8Ge0.2 superlattice films. The cross-plane thermal conductivities of these superlattice films are measured based on the 3ω method. In the theoretical analysis, the phonon transport in Si/Si1−xGex superlattice film is explored by solving the phonon Boltzmann transport equation. The dependence of the thermal conductivity of the Si/Si1−xGex superlattice films on the superlattice period, the ratio of layer thicknesses, and the interface roughness is of interest. The calculations show that when the layer thickness is on the order of one percentage of the mean free path or even thinner, the phonons encounter few intrinsic scatterings and consequently concentrate in the directions having high transmissivities. Nonlinear temperature distributions are observed near the interfaces, arising fr...

Characteristics of Thermal Resistance for High Power LEDs

In this paper the accurate and fast measurement equipment was developed and applied to study the thermal characteristics of high power LEDs. The forward-voltage based method was conducted to measure the junction temperature of high power LEDs. Conduction type method is adopted to measure the temperature sensitivity parameter (TSP) with small magnitude of error compared with the traditional method. The experiment time was reduced from 3~4 hours to 10 minutes for one sample. It was demonstrated that the repeatability of the measurement system was well after the repeatability test. LEDs used here were 5 W single chip LED and 50 W multi-chip LED with 36 chips inside the LED. Thermal resistance of junction-to-case as function of input power and case temperature was discussed. It was shown that the 5 W LED revealed an increasing trend of thermal resistance with the input power at each case temperature but the contrary trend of 5OW LED. The results also exhibited the dependency of thermal resistance and case temperature. With the increasing case temperature, the value of thermal resistance became higher under each input power. Three factors affected the thermal performance including: the first, the relation between light output efficiency and junction temperature; the second, the effect of internal series electrical resistance Rin and external electrical resistance Rex; and the third, the materials degeneration of each part inside the LEDs package as the junction temperature increased. To combine the three factors could explain the thermal characteristics of high power LEDs.

Thermo-mechanical analysis of thermoelectric modules

The present paper studies the thermo-mechanical performance of thermoelectric modules by utilizing the Finite Element Analysis FEA simulation software ANSYS. A typical type TEG device with 32 pairs of legs was constructed. Three different thickness for the pads with 100um, 500um, and 1000um were given for investigating the geometry effect. The thermo-electric results got well confirmed compared with analytical solution. The maximum Von Mises stress occurs on the contact surface between top pad and top substrate due to the large CTE mismatch between the copper pad and the A1N substrate, especially in the higher temperature case. This stress might lead to module failure and reduce the reliability.

Non-refrigerant thermoelectric air conditioning technique on vehicles

An electrical compressor technique of thermoelectric (TE) based climate control system in passenger vehicles provides solid state design and construction, non-refrigerants and the ability of providing faster time to comfort, beltless solution that enables engine-off air conditioner operation and modified the adversely impact by belt-driven vapor compression air conditioners, improved efficiency of positive temperature coefficient (PTC) heater systems. A complete scale TE air conditioning module was designed and adjusted to appropriate performance with CAE analyzing approaches, the well designed module proceeded practically constructed and tested on vehicle system to validate the design concept. In the design, system integration and energy management algorithms have been improved to further increase system level efficiency. To analyze the COP and cooling ability of the TE vehicle cooling system, a mathematical model is proposed, and a robust control algorithm is applied. The test results are presented and discussed.

Hot spot cooling in 3DIC package utilizing embedded thermoelectric cooler combined with silicon interposer

A novel design for hot spot cooling in 3DIC package by integrating the embedded thermoelectric cooler (ETC) is presented in this paper. The silicon (Si) interposer with through silicon vias (TSVs) was used as electrical paths for ETC and stacked on a Si chip that possesses a hot spot area on it. Finite element analysis (FEA) software ANSYS was utilized in present study to analyze the thermal performance. Three different structures: (1)TEC only, (2)TEC with copper ring and (3)copper spreader only were analyzed in present paper. The first two types are the novel designs and the third one is the traditional structure for thermal management in packaging. The dimensions of the Si chip and Si interposer are 5mm in length and width, and 100um in thickness, respectively. Three different sizes of hot spot area were adopted to investigate the cooling performance of each structure of package. Moreover, Si interposer used as an active device was also discussed. An improved novel design (second type: TEC with copper ring) was demonstrated from simulated results that provide the superior cooling performance to the other two structures.

Stacked Thermoelectric Generator Module Integrated with Partial Electric Conducted Interposer Structure

In this paper, we designed a new type of stacked thermoelectric generator (TEG) module integrated with partial electric conducted interposer (PECI) structure. The partial electric conducted interposer is assembled among the thermoelectric generator with 36 pairs of thermoelectric piles. The thermoelectric piles are made of P-type and N-type Bi2Te3 material with the thickness of 2 mm and the cross section area of 4 mm x 4 mm. The interposer is composed of low thermal conductivity material and partial distributed metal via, which leads to the characteristics of electrical conducted and highly thermal resisted. Results showed that under same heating power imported to the hot side of thermoelectric generator and same temperature controlled at the cold side, the temperature difference between these two sides performed a higher value of 13.6% in the interposing cases than that in conventional cases, and resulted in a higher output power of 10.6%.

Thermal performance of the IC package integrated with micro- thermoelectric device

The present work aims at the study of the cooling performance of a thermoelectric device that integrated with integrated heat spreader (IHS) on a flip-chip plastic ball grid array (FC-PBGA) package. The new thermoelectric device herein is fabricated on the metal substrates by flip-chip assembly process. Thermal performance of the new device was comprehensive studied. The thermal resistances of IHS with/without TEC were also compared. Moreover, a series of experiments have been carried out to investigate the effects of air velocity and the input power of thermoelectric device. The results showed that the new device that integrated with thermoelectric can reduce the thermal resistance of FC-PBGA package significantly.

High thermal dissipation of light emitting diodes by integrating thin film process and packaging technology

We report a brand new technique which is merged thin film fabrication process and packaging technology together to form the shortest thermal dissipation path of LED structure. The effective thermal resistance of the proposed LED was 3.54K/W, which is much better than that of the conventional one 10.8K/W and the operating current can be driven from original 230mA up to 800mA. These results indicate that the LED structure based on our work is useful in improving the performance by enabling great heat dissipation and have higher application potential than conventional one.

Thermal simulation and design of GaAs HBTs

GaAs based hetero-junction bipolar transistors (HBTs) offer high speed and good device matching characteristics that are attractive for many high-speed circuits. However, thermal behaviors with multi-fingers can significantly affect HBTs performance. In this paper, three dimensional (3-D) finite-element modeling (FEM) approaches are built up to analyze the maximum temperature region and temperature distribution of GaAs based HBTs devices. The thermal performance for two different types of unit cell including the standard cell and emitter thermal shunt cell were simulated and compared. As a result of generated heat from emitter fingers transfers to the substrate through the metal bridge, unit cell with emitter thermal shunt reduced the junction temperature significantly. The thermal effects of metal bridge thickness and various substrate thermal conductivity values are also discussed.

Thermal Measurement and Simulation of 3D stacked die packages

3D packaging has a great potential for improving circuit performance and degree of integration. It is also an attractive platform for system-in-package solution. 3D packages contain multiple heat sources that produce high power density. Heat dissipation has become a critical issue. However, unlike the single-chip package, for which thermal resistance can be easily defined and measured, the presence of multiple heat sources in multi-chip packages makes the definition of thermal resistance difficult. In addition, multiple chip temperature typically needs to be measured at various power level combinations. In this paper, the thermal performance of two dies stacked plastic ball grid array package (PBGA) has been studied. The junction-to-air thermal resistances are measured by thermal-test-chip method following the JEDEC standard environment. Thermal effects of different power level combination are discussed. In addition, the validity of the superposition technique was evaluated in the determination of junction temperatures with change in power of the various die. Finally, the thermal behavior of packages has been analyzed and validated by computational fluid dynamics (CFD) simulation.