Clifford I. Drowley

Model for facet and sidewall defect formation during selective epitaxial growth of (001) silicon

An atomistic growth model is used to explain sidewall facet and defect formation during selective epitaxial growth of (001) silicon. Films grown through oxide windows with {110} sidewall orientations exhibit facets (typically {311} planes) adjacent to the sidewall. This region also has a high density of twins. Films grown in windows oriented to have {100} sidewalls have no sidewall facets and a very low defect density. The facet morphology and twin formation at {110} sidewalls are both explained by the influence of the oxide on nucleation of {111} planes. Similar considerations indicate that films grown along {100} sidewalls are less susceptible to facet and defect formation, as observed. Experimental data on film morphology and defect structure are used to support the model.

A high-speed bipolar technology featuring self-aligned single-poly base and submicrometer emitter contacts

An experimental bipolar transistor structure with self-aligned base-emitter contacts formed using one polysilicon layer is presented with geometries and frequency performance comparable to those of double-polysilicon structures. This structure, called STRIPE (self-aligned trench-isolated polysilicon electrodes), provides a 0.2- mu m emitter-base polysilicon contact separation. A 0.4- mu m emitter width is achieved with conventional 0.8- mu m optical lithography. Scaling of the emitter width of 0.3 mu m has been performed with minimal degradation of device performance, and scaling of the emitter width pattern to 0.2 mu m has been demonstrated. These dimensions are the smallest achieved in single-polysilicon structures with polysilicon base contacts and are comparable to those achieved in double-polysilicon structures. The STRIPE structure has been used to fabricate transistors with f/sub t/ as high as 33.8 GHz.<<ETX>>

STRIPE-a high-speed VLSI bipolar technology featuring self-aligned single-poly base and submicron emitter contacts

Experimental results are presented for a high-performance silicon bipolar transistor structure utilizing a single layer of polysilicon for both the base and emitter contacts. This structure, called STRIPE (self-aligned trench-isolated polysilicon electrodes), provides a 2.0-&mu;m emitter/base polysilicon contact separation. A 0.4-&mu;m emitter width is achieved with conventional 0.8-&mu;m optical lithography. These dimensions are comparable to those achievable with double-poly structures. Using the STRIPE structure, transistors have been fabricated with cutoff frequency as high as 33.8 GHz

Oxygen implantation for internal gettering and reducing carrier lifetime

Implantation of oxygen into Si wafers has been studied as a method to create a defect region for gettering impurities. An epitaxial layer is subsequently deposited to bury the defects. The nature of the defects as well as the effects on the quality of epitaxy, carrier lifetime, and diode leakage current is characterized.

Oxygen implantation to suppress parasitic bipolar action in CMOS

Oxygen implantation and subsequent epitaxial silicon deposition have been developed to improve CMOS latchup prevention through reducing the current gains of parasitic bipolar transistors. The buried oxygen implanted layer is well confined, and defects do not extend into the epitaxial silicon layer. The device characteristics of the n- and p-MOSFETs fabricated on a wafer with the oxygen implantation are therefore not affected by the buried implanted layer. The oxygen implanted layer can reduce the minority-carrier lifetime and hence decrease the current gain of the lateral parasitic bipolar transistor. In addition, it introduces a potential barrier which decreases the current collected at the frontside contact of the vertical parasitic bipolar transistor. The common base current gain is reduced by 50% and 80% for the lateral and the vertical parasitic bipolar transistors, respectively. As a consequence, the CMOS latchup immunity is significantly improved. >

Ultrashallow Diffused Emitter-Base Profiles For Bipolar Device Applications Using Rapid Thermal Processing

The viability of rapid thermal processing is assessed for the fabrication of extremely shallow emitter-base profiles in bipolar devices. Junctions diffused from polysilicon using either rapid thermal processing (RTP) or conventional furnace drives are characterized using secondary ion mass spectrometry (SIMS). Results are compared to SUPREM III simulations of the diffusion process. Electrical data is compared for npn polysilicon emitter bipolar devices with emitter-base junctions fabricated using either an RTP emitter drive at 10500C or a conventional furnace drive at 9100C. Potential advantages and disadvantages of RTP are discussed including polysilicon/silicon interface control and required temperature uniformity.

Ultra-Shallow Diffused Emitter-Base Profiles Fabricated by Rapid Thermal Processing for High Speed Bipolar Devices

The development of next-generation high-speed bipolar devices depends critically on reproducible shallow dopant profiles, with base and emitter widths considerably less than 1000 Angstroms. Sequential diffusion of boron and arsenic from implanted polysilicon is a promising means of producing such shallow emitter-base profiles. The restricted thermal budget required to reproducibly form such shallow junctions severely limits the use of conventional furnaces. We report the formation of extremely shallow emitter-base profiles using rapid thermal processing (RTP) in a double-diffused polysilicon emitter process. Polysilicon was implanted with various doses of BF 2 and subjected to a conventional furnace anneal at 900oC. This process was followed by As implantation and furnace anneal at 900oC or RTP at 10500C or 1100oC. A range of emitter-base profiles was generated with emitter and base widths ranging from 350-800A. Emitter-base profiles were measured using low-energy Secondary Ion Mass Spectrometry (SIMS), after removal of the polysilicon to improve depth resolution. Deconvolution of the instrumental broadening function allowed extraction of base and emitter widths as well as the boron concentration in the base. Variation of the profiles is discussed as a function of anneal times and implant dose. Modified SUPREM III parameters are obtained for diffusivities under these RTP conditions. The implications for high speed bipolar device fabrication will be presented.