Clyde R. Fuller

Application of Ti: W barrier metallization for integrated circuits

Abstract Aluminum metallization is the most widely used for contacts and interconnections in integrated circuits. However, the solid state diffusion of aluminum in silicon during contact sintering or high temperature packaging can result in junction shorting or leakage in shallow ( 2 / ti:W/Al film test samples have shown that the resistivity of aluminum increases owing to diffusion of titanium or tungsten into the aluminum. However, the kinetic data show that no more than a 10% increase in the resistivity of the aluminum can be expected in the useful life of a device. High current stress data show that Ti:W/Al interconnections are comparable with those of aluminum films. Auger depth profiling of si/Ti:W/Al samples annealed at 450, 500 and 550°C in N 2 shows no aluminum at the Si-(Ti:W) interface. Application of the PtSi/Ti:W/Al metallization system for large-scale integrated circuits is described.

Metallization in microelectronics

Abstract Continued improvements in the design and fabrication of semiconductor devices have led to the introduction of medium and large scale integration of microcircuits. These advances have placed severe demands on metallization techniques, requiring metal contacts to shallow junction devices and definition of metal interconnections that are closely spaced and of a narrow pattern. Aluminum is the most widely used metal in microelectronics for providing the necessary contacts and interconnections. The contact resistance of the SiAl interface is sensitive to surface preparation, the vacuum ambience of the Al film deposition and contact sintering. Controlled contaminations, such as H2O, CO and O2, have been introduced during the Al film deposition in order to determine their effects on Al/Si contacts. Extensive studies have shown the interdependence of the film deposition parameters, the physical properties of the Al films and the dominant failure mechanisms, such as electromigration, that limit the reliability of integrated circuit interconnections. For high speed very shallow emitter-base junction devices, Al in silicon contact windows can penetrate to the junction during sintering and can cause leakage. Solutions to this problem include the use of Al + Si films, PtSi contacts with a barrier layer (e.g. Ti:W) and Al or Au conductors. Metallization must be suited to all the device processing steps beginning with contact sintering, device packaging, testing and also the operating conditions. Highly complex large scale integrated circuits require multilevel interconnections. A two-level metallization scheme (Al/insulator/Al) and its application are presented. Future trends in metallization processing are also discussed.

Corrosion Resistance of Several Integrated-Circuit Metallization Systems

Accelerated life data are presented on several integratedcircuit metallization systems including Al, Mo-Au, Ti-Pt-Au, and a new system Ti: W-Au where the RF sputtered Ti: W layer is a pseudo alloy of 10-20 percent Ti in W. Life tests include total water immersion, high-pressure steam and 85°C/85 percent RH/bias on bare and plastic-encapsulated devices. Heat-age and resistivity-ratio data are presented showing the metallurgical stability of the Ti: W-Au system. The corrosion resistance decreases as Ti-Pt-Au > Ti: W-Au >> Mo-Au ? Al.

Electromigration‐Induced Failures in, and Microstructure and Resistivity of, Sputtered Gold Films

Sputtered gold film conductors have been subjected to high current densities in the range of 2.0–3.5×106 A/cm2 in 150 °C air ambience, and data on the mean time to failure (MTF) vs current density J are presented. In this study, a corrosion‐resistant Ti: W–Au metallization system is used. The microstructure and resistivity of the sputtered gold films have been examined and the observed excess resistivity of the sputtered gold films is attributed to gaseous impurities in the film. The average grain size of the sputtered films is 2000 A. The MTF‐vs‐J data are compared with those of aluminum film conductors and an activation energy of 0.90 eV has been estimated for electromigration in sputtered gold films.

Magnetron-sputtered aluminum films for integrated circuit interconnections

Abstract Aluminum films for integrated circuit (IC) contacts and interconnections are routinely deposited by thermal evaporation from resistance-heated, induction-heated and electron-beam-heated sources. Sputtering has not been used until recent advances produced magnetron sputter deposition equipment capable of depositing aluminum films compatible with IC requirements. This paper describes results of a study on magnetron-sputtered aluminum films for IC interconnections. A circular planar magnetron 20.3 cm in diameter was employed for film deposition on silicon substrates 7.6 cm in diameter moving on a circular path above the cathode. Metal coverage was better than 50% for oxides steps with 70° step angles and was equivalent to or better than that observed with other deposition techniques. Aluminum films typically 1 μm thick, having resistivities within 10% of the bulk value of 2.71 μΩ cm, were routinely deposited in this system. Film conductors 12 μm wide and 1.14 mm long, patterned on oxidized silicon substrates and coated with plasma-deposited SiO2 were used for resistivity ratio RR(=ρRT/ρ4.2K) measurements; the RRs lie in the range 35–50. The microstructure of magnetron-sputtered aluminum films is similar to that of conventionally deposited films. MOS capacitor structures fabricated on p-type silicon substrates with sputter-deposited aluminum films showed C-V characteristics comparable with those obtained by using aluminum films deposited from electron-beam-heated or induction-heated sources. Magnetron sputtering appears to produce films as suitable for IC contacts and interconnection applications as any other physical vapor deposition process and offers solutions to problems generated by the requirements of advanced device technology.

Clean Metal Oxide Semiconductor Systems

Aspects of sodium contamination of metal-oxide-silicon (MOS) systems associated with silicon surface preparation, the oxidation plenum, and post-oxidation procedures, including contact application, are discussed. The validity of neutron activation analysis to determine sodium distributions in MOS samples is established. Refractory materials for furnace construction are examined and shown to contain as much as 1 - 5 percent sodium or potasium. Use of multiwall quartz furnace tubes as well as cold wall r-f heated systems is shown to give low sodium content oxides. Sodium levels as low as 4×1015 atoms/cc in the oxide, have been attained. Silicon crystals are shown to contain ? 1014 atoms-Na/cc. A typical chemically polished silicon surface generally retains an oxide contaminated at ? 1013 atoms-Na/cm2. This native oxide is sufficient to account for the shape of the sodium distribution, as well as the amount of sodium found in thermal oxides. Additional discussion is made of the impurity levels associated with contact application. The combination of oxidation and contact procedures is shown to yield MOS samples which suffer no change in C-V characteristics after stress at 300° C and 1 x 106 V/cm applied across the oxide.