Corinne Berland

EER architecture specifications for OFDM transmitter using a class E amplifier

This letter presents envelope elimination and restoration (EER) architecture specifications in the case of orthogonal frequency division multiplex C band transmission. A key point is the recombination of envelope and phase information by supply modulation of the power amplifier (PA). Imperfections, such as time mismatch and phase noise can reduce the performances of the transmission. Compression and conversion effects when supply modulating the PA are introduced in this letter with the simulation of a class E power amplifier. This amplifier was designed under HP-ADS using a nonlinear MESFET model. Results are reported in terms of error vector measurement and spectrum for two different numbers of sub-carriers 32 and 128 in 16-QAM and 64-QAM cases.

Influence of time and processing mismatches between phase and envelope signals in linearization systems using envelope elimination and restoration, application to Hiperlan2

This paper is a theoretical and experimental study of the influence of time and processing mismatches between the envelope and the phase of an OFDM in an envelope elimination and restoration (EER) linearization system. We give the theoretical expression of the power spectral density of the distorted signal in the case without intersymbol interference at the emitter. In the general case, we give the average power of the distortion as a function of the time mismatch. We also propose an approximation of the distorted signal as a delayed version of the original signal, that explains the observed rotations of the constellations at the receiver on the different OFDM carrier. Others effects of EER principle are also studied, such as limitation of envelope and phase bandwidth and non-linearity of the envelope restoration command.

PWM coding and filtering of an OFDM envelope signal in a C band EER transmitter architecture

This paper concerns the simulation of OFDM envelope path in an EER architecture. The envelope information is clipped to reduce the dynamic variation, PWM coded and low-pass filtered. The PWM coding is simulated with a modified Schmitt trigger with different hysteresis values. The reference voltage shape and frequency choice are discussed. The low-pass filter parameters depend on the frequency of the reference voltage signal and are summarized. The conclusion shows the tradeoff between spectral response and EVM results for choosing Fcomp (frequency of reference signal in the trigger) and h (hysteresis parameter). All simulations are done under HP-ADS software for 16-QAM modulation scheme.

A New Dual mode GSM/EDGE transceiver using modulation loop

Transmitting data with GSM system is a real need. ETSI, the European Telecommunication Standard Institute, is working actually on a new standard, called EDGE, Enhanced Data rates for GSM Evolution, which will offer transmission data rate up to 384Kbits/s [1]. On the radio point of view, this new standard implies important modifications due to the modulation. For Dual mode hand portable, actual GSM transceiver has to be rebuilt. We are here presenting a new transmitter architecture which will enable dual mode functionality with minimum modification.

EVM considerations for convergent multi-standard cellular base-station transmitters

Modern cellular base stations are becoming increasingly multi-carrier and multi-standard/multi-mode for improved efficiency and manageability. Primary among prospective multi-mode base station deployments will be those that are reconfigurable but also capable of simultaneous transmission of several types of cellular signals. However, unified or convergent-transmitter design is challenging, particularly with the small specified tolerances for signal distortion. We present an analysis of the Error Vector Magnitude (EVM) specifications for GSM/EDGE, UMTS and LTE, based on simulated EVM sensitivity to various distortions, focusing on a convergent transmit chain for multi-standard, multi-carrier macro-cell base stations. These analyses illustrate a method of deriving preliminary radio transmitter performance (phase noise, IQ imbalances, noise floor etc.) requirements, alongside helping to expose bottlenecks and performance tradeoffs necessary to optimize power consumption. A preliminary distribution of distortion or performance among the blocks is presented, to achieve the less than 5% multi-mode EVM budget, for worst-case scenarios.

Gain and delay mismatches cancellation in LINC and polar transmitters

This article presents the application of a gradient algorithm on impairments correction for polar and LINC transmitters (LInear amplification with Non linear Component). The two aspects of the approach are presented: identification and correction. The large improvements obtained using such solutions are demonstrated for both transmitters.

Low-power digitally-controlled variable gain LNA with high isolation for sub-GHz ISM bands

A low-power digitally-controlled variable gain low noise amplifier is implemented in a 40-GHz fT 0.25 ¿m BiCMOS process. Wideband input matching independent of the variable gain, as well as high reverse isolation are achieved thanks to a partial feedback technique. The variable gain is based on a resistor-chain gain-control technique, leading to fine gain steps and constant output impedance. It covers the sub-GHz ISM bands for automotive applications such as Remote Keyless Entry. This LNA is designed with 15 gain steps of 1 dB. The simulated results for the maximum gain show a Transducer Power Gain of 16.5 dB, a Noise Figure of 2.4 dB and respective input and output IP3 of -12.1 dBm and +4.5 dBm, while only drawing 1.45 mA from a 2.7 V power supply. The measurement results are slightly degraded because of wire-bonding couplings in the package.

Linear transmitter architecture using a 1-bit /spl Sigma//spl Delta/

Linearity of transmitter is a difficult point to achieve with non constant envelope modulation. The simplest solution is to use a class A power amplifier with sufficient back off, so that sufficient linearity can be obtained but to the detriment of the efficiency. In this paper we present a development of the classical EER architecture where the non constant modulated signal is transformed into a constant one. The envelope variation is restored after an efficient power amplifier with a simple bandpass filter. The key point of this architecture is a full digital 1-bit sigma-delta modulator used to transform the envelope signal into a series of pulses working at frequencies up to 1 GHz

Monte-Carlo estimation of time mismatch effect in an OFDM EER architecture

New 5 GHz wireless local area networks standards use OFDM modulation in order to increase data rate transfer. An OFDM transmitter needs a linearization technique due to nonlinearities of the power amplification operation. The EER architecture can be used to solve this problem while keeping high efficiency. However several sources of imperfections lower the quality of the signal. Time mismatch has especially a great impact on EVM and spectral re-growths. This work presents a Monte Carlo study of envelope/phase delay influence on the OFDM signal. The autocorrelation is estimated considering the OFDM signal as complex Gaussian.

A 2GHz 65nm CMOS digitally-tuned BAW oscillator

The design of a 2GHz reference frequency oscillator in a 65nm CMOS process using a Bulk Acoustic Wave resonator is presented. The oscillator implements digital frequency control using a switched capacitor bank in parallel to the resonator. The tuning range is up to 4MHz with a minimum step of 1.6kHz. The oscillator core is designed to reach low phase noise (-128dBc/Hz at 100kHz offset) at low power consumption (0.9mW) using a differential topology. It is followed by a low noise divider for output at 500MHz with a phase noise of -140dBc/Hz at 100kHz offset.