Craig Jasper

Interdigitated Ge p-i-n photodetectors fabricated on a Si substrate using graded SiGe buffer layers

We report an interdigitated p-i-n photodetector fabricated on a 1-/spl mu/m-thick Ge epitaxial layer grown on a Si substrate using a 10-/spl mu/m-thick graded SiGe buffer layer. A growth rate of 45 /spl Aring//s/spl sim/60 /spl Aring//s was achieved using low-energy plasma enhanced chemical vapor deposition. The Ge epitaxial layer had a threading dislocation density of 10/sup 5/ cm/sup -2/ and a rms surface roughness of 3.28 nm. The 3-dB bandwidth and the external quantum efficiency were measured on a photodetector having 1-/spl mu/m finger width and 2-/spl mu/m spacing with a 25/spl times/28 /spl mu/m/sup 2/ active area. At a wavelength of 1.3 /spl mu/m, the bandwidth was 2.2, 3.5, and 3.8 GHz at bias voltages of -1, -3, and -5 V, respectively. The dark current was 3.2 and 5.0 /spl mu/A at -3 and -5 V, respectively. This photodetector exhibited an external quantum efficiency of 49% at a wavelength of 1.3 /spl mu/m.

Transient enhanced diffusion after laser thermal processing of ion implanted silicon

The effect of laser thermal processing (LTP) on implantation-induced defect evolution and transient enhanced diffusion (TED) of boron was investigated. A 270-A-thick amorphous layer formed by 10 keV Si+ implantation was melted and regrown using a 20 ns ultraviolet laser pulse. Transmission electron microscopy revealed that recrystallization of the amorphous layer following LTP results in a high concentration of stacking faults and microtwins in the regrown region. Also, the end-of-range loop evolution during subsequent 750 °C furnace annealing, is different in a LTP sample compared to a control sample. Secondary ion mass spectroscopy of a boron marker layer 6000 A below the surface showed that LTP alone produced no enhanced diffusion. However, during subsequent furnace annealing, the boron layer in the LTP sample experienced just as much TED as in the control sample which was only implanted and furnace annealed. These results imply that laser melting and recrystallization of an implantation-induced amorph...

Fabrication and modeling of gigahertz photodetectors in heteroepitaxial Ge-on-Si using a graded buffer layer deposited by low energy plasma enhanced CVD

Photodetectors were fabricated in a heteroepitaxial Ge-on-Si deposited by low energy plasma enhanced CVD. Dark current density of 4.6 nA//spl mu/m, 49 % quantum efficiency, and a -3 dB bandwidth of 3.5 GHz were measured at 1.3 /spl mu/m wavelength and -3 V bias. Numerical simulations predict device modifications can achieve 10 Gbps (/spl cong/ 7 GHz) bandwidth.

Improving manufacturability of an rf graded channel CMOS process for wireless applications

Motorolas Graded Channel CMOS (GCMOS) provides a low cost and highly integrated solution for mixed-mode and RF applications. The GCMOS transistor has demonstrated performance advantages over standard CMOS processes with the same physical gate length. The graded channel, fabricated using lateral diffusion, provides a deep submicron Leff even with a gate length of 0.6 micrometer. The technology is constructed using a process that is fully compatible with standard CMOS manufacturing. However, in order to assure adequate threshold control, the lateral diffusions must be well-behaved. This means that both the channel implant and the source/drain implant must be truly self-aligned, requiring good control of the implants as well as the gate electrode profile. For aggressively designed GCMOS devices, small deviations of the implant beam from normal incidence can lead to unacceptable shifts in threshold. The sources of such error, and current industry standard machine tolerances for each, are discussed. Strategies for ensuring adequate control include a regimen of in-line process monitors, approximate error cancellation of the channel and source/drain implants, and the use of quadrature implants. By using these strategies a manufacturable process has been achieved.

Process control issues for retrograde well implants for narrow n+/p+ isolation in CMOS

Shallow trench isolation (STI) is being scaled down in both width and depth to increase device packing densities. Critical to the success of interwell isolation is the accurate placement of the n-well/p-well junction in the center of the region below the STI oxide. Zero degree implants avoid shadowing effects from resist features but can reduce process robustness due to channeling-induced profile variations. The shape of dopant profiles near 0° tilt vary significantly with tilt angle changes too small to control on even advanced ion implanters. We modeled 150nm devices with a 380nm n+/p+ spacing and show that these profile variations lead to significant shifts in transistor threshold voltage and n-well to n+ leakage. We calibrated our simulator with SIMS data to accurately model transistor and interwell breakdown performance for 0° well implants for the first time. We also modeled the same structures made with implants at 3° tilt using quad repositioning. Low angle quad implants for retrograde wells eliminate shadowing effects while delivering superior process robustness as compared to 0° well implants.

The effect of implantation, energy, and dose on extended defect formation for MeV phosphorus implanted silicon

The effect of dose and energy on postannealing defect formation, for high energy (MeV) phosphorus implanted into epitaxially grown silicon, has been studied by etch pits and transmission electron microscopy (TEM). The phosphorus dose was varied from 1×1013 to 5×1014 cm−2 and the energy was varied from 180 to 5000 keV. After implantation, the wafers were processed through subsequent annealing cycles which simulates a typical advanced complementary metal–oxide–semiconductor process to understand the formation of the defects in the near surface and projected range. For phosphorus energies above 500 keV, the threading dislocation density (TDD), increases dramatically with increasing dose from below the minimum detection limit (5×103 cm−2) at a dose of 1×1013 cm−2 to a maximum above 1×106 cm−2 for a dose of 1×1014 cm−2. However, with further increases in dose, the TDD decreases back close to the minimum detection limit. Plan-view TEM suggests that with increasing dose, the formation of extended defects at the ...

The Effects of Implanted Nitrogen on Diffusion of Boron and Evolution of Extended Defects

We studied effects of nitrogen on reduction of boron diffusion in BF 2 -implanted source/drain regions of a p-channel MOSFET. Evolution of extended defects induced by nitrogen implantation in silicon and its dependence on implant energy were investigated. Characterization with TEM and SIMS led to validation of models of nitrogen as interstitial traps and strain-induced gettering. Electrical measurement of the PMOS threshold voltage shows a consistent trend of the nitrogen effects on boron redistribution in the S/D regions.

Effect of annealing time and temperature on the formation of threading and projected range dislocations in 1 MeV boron implanted Si

The effect of annealing temperature and time on the formation of threading dislocations was investigated for high energy boron implants into silicon. 1 MeV B+ was implanted at a dose of 1×1014/cm2 into 〈100〉 Si wafers. The wafers were subsequently annealed in either a rapid thermal annealing (RTA) furnace or a conventional furnace for times between 1 s and 1 h at temperatures between 700 and 1150 °C. Following this anneal the wafers were put through a standard complementary metal-oxide-semiconductor (CMOS) process. After processing, the threading dislocation density and projected range dislocation density were studied using etch pit density counts and transmission electron microscopy (TEM). The results show that annealing (either RTA or furnace) at temperatures above 1000 °C prior to CMOS processing reduced the high density of threading dislocations by 1–2 orders of magnitude. Quantitative plan-view TEM studies show that the mechanism for defect reduction is different for the RTA versus furnace annealing ...

The effect of TEM sample thickness on nucleation and growth and dissolution of {311} defects in Si+ implanted Si

Abstract The effect of sample thickness on the nucleation, growth and dissolution of {311} defects in non-amorphizing 100 keV, 2×1014 cm−2 Si+ implanted Si has been investigated by plan-view transmission electron microscopy (PTEM) and cross-section TEM (XTEM). The samples were annealed at 800°C for times between 5 and 30 min. Results from samples annealed prior to TEM sample preparation were compared with samples annealed after thinning for TEM. The observed region in the TEM in both cases was 4000 A thick. TEM showed both the {311} extended defects and sub-threshold dislocation loops formed upon annealing. The depth distribution of these defects is centered around the ion damage profile. Quantitative TEM was used to measure the trapped interstitial concentration. The total interstitial concentration trapped in {311} defects and loops after annealing at 800°C for 5 min was determined to be ∼1×1014±1×1013 cm−2 for the thick samples and ∼0.9×1014±1×1013 cm−2 for the thin samples. The rate constant for {311} dissolution was determined from quantitative TEM to be 420 s for both the thick and thin samples. The existence of the second surface in the thin samples may affect the nucleation process slightly, but the existence of the second surface 2000 A below the implant layer has no measurable effect on the coarsening and dissolution of {311} defects and the evolution of the sub-threshold loops. This implies that the surface must be less than 2000 A from the implant layer to affect the interstitial evolution.

Threading dislocation evolution in mega-electron-volt phosphorus implanted silicon

The effect of dose and energy on postannealing defect formation for high energy (mega-electron-volt) phosphorus implanted silicon has been studied using etch pit studies and transmission electron microscopy (TEM). Previous work has shown that after annealing there is a strong dependence of dislocation density threading to the surface on the implanted phosphorus dose and energy. A superlinear increase in threading dislocation density (TDD) with implant energy between 180 and 1500 keV is observed for a dose of 1×1014 cm−2. In addition as a function of ion fluence, there is a maximum in the threading dislocation density at a dose of 1×1014 cm−2 followed by a rapid decrease in TDD. Both the superlinear increase in TDD with increasing energy and the rapid decrease with increasing dose have been further investigated by TEM. A TEM study of these higher doses revealed formation of a strong bimodal loop distribution with small loops averaging <1000 A and large loops averaging around 1 μm in size. Over the dose ran...