Cuc K. Huynh

Plasma versus ozone photoresist ashing: Temperature effects on process‐induced mobile ion contamination

Thin gate oxides used in metal‐oxide‐semiconductor devices are susceptible to mobile ion contamination introduced at critical patterning levels during photoresist stripping. Trace amounts of heavy, alkali metal ions such as sodium (Na+) and potassium (K+) that are found in even the best photoresists are very difficult to oxidize and do not form volatile products that can be easily removed in a typical O2 plasma. These ionic, heavy metals and their byproducts can be driven into critical underlying layers by self‐induced bias potentials and positive ion bombardment within an O2 plasma environment. To examine this potential problem, a series of commercially available photoresist ashing systems were selected to study the influence of process‐induced mobile ion contamination on sensitive underlying devices. The systems tested included a ‘‘downstream’’ rf plasma asher, a ‘‘downstream’’ microwave plasma system, and a nonplasma ozone ashing system. In this study, photoresist stripping rates and mobile ion (Ni) co...

A study of post-chemical-mechanical polish cleaning strategies

Chemical-mechanical polishing (CMP) has emerged as the premier technique for achieving both local and global planarization. One of the primary concerns in the use of CMP, however, is the efficient and complete removal of CMP contaminants such as slurry and residual hydrocarbons. This paper discusses the removal of silica-based slurries utilized for polysilicon and oxide CMP processes. The effects of mechanical brush cleaning, chemical treatments, and polish processes on defect density for a 16 Mb memory technology are presented. In addition, the chemical compatibility of polishing slurries with various brush and polishing pad materials is discussed.

Chrome dry etching for 65-nm node mask manufacturing

A new chrome etch system was acquired and implemented to manufacture 65 nm node critical level masks. The etch performance of FEP 171, ZEP 7000, NEB 22, and REAP 200 resist systems in this new chrome etch system was evaluated. The critical dimension (CD) uniformity, etch bias, and etch linearity of this new etch system relative to the older generation etch system is presented. Implementation of the new etch system resulted in a 40-60 nm reduction in etch bias with no degrade in CD uniformity performance. In addition, it was found that the etch contribution to CD linearity was reduced by 50%. Detailed characterization of both macroloading and microloading etch effects was performed and showed substantial improvement relative to the previous generation etch system. The change in chrome etch rate as a function of etch area was reduced by 50%, improving mean to target CD performance on new designs. Implementation of the new etch system has enabled achievement of CD and defect density performance requirements for 65 nm node mask manufacturing. The results presented in this paper were collected during the process development phase and are not necessarily representative of the final optimized process.

Photomask automation improvement to eliminate manufacturing errors

Photomask manufacturing automation has lagged semiconductor wafer process automation development. In a highly complex wafer fab, data automation and advanced process control techniques are required. Given limited demand, photomask equipment manufacturers have not unilaterally made the investment necessary to implement a standardized data flow protocol which would allow photomask process automation enhancements. Surveys indicate that significant photomask yield loss is attributed to manufacturing and administrative errors. By working with individual photomask equipment suppliers and through internal application development, IBM photomask manufacturing automation has eliminated nearly all manufacturing and administrative errors. Some examples of processes that were automated over the past several years are process routing selection, photomask yield prediction, linkage of photomask blank to mask build part number, automated recipe and setup download and dispositioning criteria, statistical analysis of process parameters and defect density, defect information management and automated data upload for photomask and wafer engineering use. Project highlights will be discussed and the case will be made for standardization of data flow protocol and for further photomask process automation improvements.

Utilization of optical emission endpoint in photomask dry etch processing

Use of accurate and repeatable endpoint detection during dry etch processing of photomask is very important for obtaining good mask mean-to-target and CD uniformity performance. It was found that the typical laser reflectivity endpoint detecting system used on photomask dry etch systems had several key limitations that caused unnecessary scrap and non-optimum image size performance. Consequently, work to develop and implement use of a more robust optical emission endpoint detection system for chrome dry etch processing of photomask was performed. Initial feasibility studies showed that the emission technique was sensitive enough to monitor pattern loadings on contact and via level masks down to 3 percent pattern coverage. Additional work was performed to further improve this to 1 percent pattern coverage by optimizing the endpoint detection parameters. Comparison studies of mask mean-to-target performance and CD uniformity were performed with the use of optical emission endpoint versus laser endpoint for masks built using TOK IP3600 and ZEP 7000 resist systems. It was found that an improvement in mean-to-target performance and CD uniformity was realized on several types of production masks. In addition, part-to-part endpoint time repeatability was found to be significantly improved with the use of optical emission endpoint.

Post-chemical-mechanical planarization cleaning application in metallization

Chemical-Mechanical Polishing (CMP) has emerged as the most important technique for achieving both local and global planarization in VLSI fabrication. One of the primary concerns in the use of CMP, however, is the efficient and complete removal of CMP contaminants such as slurry and polishing debris. This paper discusses the removal of alumina-based slurries utilized for the planarization technique of metal interconnect processes. The analysis of the treatment of the post-CMP metallized wafer surface with an aqueous solution, and the application of the chemical solution insitu to the polishing processes are presented.