D. Herbst

MOS switched-capacitor filters with reduced number of operational amplifiers

Using voltage inverter switches, exact analog sampled-data equivalents of Rs, Ls and Cs, as well as unit elements, can be designed with MOS capacitors and switches. Due to the underlying bilinear transformation, no limitation other than the Nyquist limit is imposed on the ratio of corner to sampling frequency. For an nth order filter, the number of voltage inverter switches is (n+1)/4 to (n+1)/2. A 3.4 kHz third-order Chebyshev low-pass CMOS circuit is described in detail. It uses only one voltage inverter switch implemented by a switched op amp integrator. The sampling frequency is 24 kHz, the dynamic range exceeds 70 dB and the chip area is 1.2 mm/SUP 2/. A CMOS voltage inverter switch, which has zero DC power and occupies only 0.09 mm/SUP 2/ is presented, whose dynamic range exceeds 85 dB. This allows low power switched capacitor filters without operational amplifiers and with a frequency capability approaching the megahertz range.

Real-time programmable low power SC bandpass filter

A real-time programmable switched-capacitor (SC) 2nd order bandpass filter is presented. It is based on voltage inverter switch (VIS) principle using inverse recharging devices. These devices are realized with dynamic amplifiers in order to achieve low power dissipation. The filter contains only grounded or virtually grounded network capacitances and therefore it is insensitive to the parasitics between the bottom plates of the implemented MOS capacitors and the substrate. It offers digital programming capability (two Q-factors and three center frequencies) and low power dissipation (185 μW at sampling frequency 8 kHz and power supply voltage 10 V). The filter has been integrated in standard CMOS metal-gate technology.

An integrated seventh-order unit element filter in VIS-SC technique

Describes a seventh-order unit element switched-capacitor filter based on the voltage invertor switches-switched capacitor (VIS-SC) concept. The operation of this filter is described in detail. It is shown that the effect of parasitic bottom plate capacitances can be overcome by using a special type of VIS. The influence of the top plate parasitics on the filter properties is discussed. Experimental results of an integrated NMOS version are given.

A 7th Order Unit Element Filter in VIS-SC Technique

The large parasitic capacitances of MOS capacitors to substrate usually degrades the performance of VIS-SC filters. It will be discussed, how the effect of such parasitics can be reduced by selection of a suitable set of network elements. Experimental results of a fully integrated 7th order low pass with only 4 op amps will be given.

Integrated Interface Circuits for Capacitive Micromechanical Sensors

Caused by rapid progress of silicon technology, electronic circuits and micromechanical sensors like accelerometers and pressure transducers can now be fabricated as microstructures [1,2,3]. Most sensors transform the external force into either a piezoelectric or a capacitive signal. For some applications, capacitive sensors are more sensitive and less temperature dependend than their piezoelectric counterparts and are therefore being preferred.