J. Pandel

MOS switched-capacitor filters using voltage inverter switches

Low-sensitivity switched-capacitor filters imitating LC and LC /unit-element structures can be built by means of capacitances, ordinary switches, and voltage inverter switches, the latter being quite simply realizable by electronic means (either with or even without operational amplifier). There are no restrictions on the operating rate (other than those resulting from the Nyquist theorem) nor on the location of the attenuation poles. Experimental results of an integrated third-order lowpass filter are in good agreement with theory. The effects of parasitic capacitances can be overcome by using proper design techniques.

Design of Bireciprocal Wave Digital Filters for High Sampling Rate Applications

Abst rac t : In this paper, the realization of bireciprocal wave digital filters (WDFs) in a dedicated bit-parallel architecture will be described. These filters are especially attractive for high sampling rate applications. The required hardware for a realization in dedicated hardware is reduced to less than half while the circuits can operate about twice as fast compared to other WDFs. A suitable WDF structure has been selected which contains a minimum number of operations to be carried out consecutively in the directed loops. To increase the operating rate of the filters the carry-save approach is chosen. It will be shown ho w stability of the filters is ensured in such a redundant number system and how overflow can be handled. An example of a WDF adaptor in carry-save technique will be given.

MOS switched-capacitor filters with reduced number of operational amplifiers

Using voltage inverter switches, exact analog sampled-data equivalents of Rs, Ls and Cs, as well as unit elements, can be designed with MOS capacitors and switches. Due to the underlying bilinear transformation, no limitation other than the Nyquist limit is imposed on the ratio of corner to sampling frequency. For an nth order filter, the number of voltage inverter switches is (n+1)/4 to (n+1)/2. A 3.4 kHz third-order Chebyshev low-pass CMOS circuit is described in detail. It uses only one voltage inverter switch implemented by a switched op amp integrator. The sampling frequency is 24 kHz, the dynamic range exceeds 70 dB and the chip area is 1.2 mm/SUP 2/. A CMOS voltage inverter switch, which has zero DC power and occupies only 0.09 mm/SUP 2/ is presented, whose dynamic range exceeds 85 dB. This allows low power switched capacitor filters without operational amplifiers and with a frequency capability approaching the megahertz range.

Real-time programmable low power SC bandpass filter

A real-time programmable switched-capacitor (SC) 2nd order bandpass filter is presented. It is based on voltage inverter switch (VIS) principle using inverse recharging devices. These devices are realized with dynamic amplifiers in order to achieve low power dissipation. The filter contains only grounded or virtually grounded network capacitances and therefore it is insensitive to the parasitics between the bottom plates of the implemented MOS capacitors and the substrate. It offers digital programming capability (two Q-factors and three center frequencies) and low power dissipation (185 μW at sampling frequency 8 kHz and power supply voltage 10 V). The filter has been integrated in standard CMOS metal-gate technology.

An integrated six-path wave-SC filter

Experimental results of a switched capacitor (SC) N-path filter integrated in a CMOS Si-gate technology are reported, with N=6. The circuit is based on the theory of wave-flow networks and uses only fully stray-eliminating (usually referred to as stray-insensitive) SC amplifier and integrator circuits. The two main drawbacks of N-path filters, i.e. unwanted mirror frequencies due to path mismatch and clock feedthrough located in the passbands, as solved by multiplexing large filter parts and by using a third-order high-pass reference filter, respectively. The integrated six-path filter features low power consumption due to the use of dynamic amplifiers.

An integrated seventh-order unit element filter in VIS-SC technique

Describes a seventh-order unit element switched-capacitor filter based on the voltage invertor switches-switched capacitor (VIS-SC) concept. The operation of this filter is described in detail. It is shown that the effect of parasitic bottom plate capacitances can be overcome by using a special type of VIS. The influence of the top plate parasitics on the filter properties is discussed. Experimental results of an integrated NMOS version are given.