D. Kasai

Numerical analysis of slow current transients and power compression in GaAs FETs

Two-dimensional transient simulation of GaAs MESFETs is performed when the gate voltage and the drain voltage are both changed abruptly. Quasi-pulsed current-voltage (I-V) curves are derived from the transient characteristics. It is discussed how the slow current transients (lag phenomena) and the pulsed I-V curves are affected by the existence of substrate traps and surface states. It is shown that the so-called power compression could occur both due to substrate traps and due to surface states. Effects of impact ionization of carriers on these phenomena are also discussed. It is shown that the lag phenomena and the power compression are weakened when impact ionization of carriers becomes important, because generated holes may help the traps to change their ionized densities quickly.

Analysis of surface-state and impact-ionization effects on breakdown characteristics and gate-lag phenomena in narrowly recessed gate GaAs FETs

Effects of surface states and recess structures on breakdown characteristics of GaAs MESFETs are studied by two-dimensional (2-D) analysis. It is shown that the breakdown voltage could be raised when moderate densities of surface states are included. However, in a case with relatively high densities of surface states, the breakdown voltage could be drastically lowered when introducing a narrowly recessed gate structure. Effects of impact ionization on gate-lag phenomena in GaAs MESFETs are also studied. It is shown that the gate-lag becomes weaker when including the impact ionization. This is attributed to the fact that the potential profiles along the surface are drastically changed when the surface states capture generated carriers. It is suggested that there is a tradeoff relationship between raising the breakdown voltage and reducing the gate-lag.

Simulation of Lag Phenomena and Pulsed I-V Curves of Compound Semiconductor FETs as Affected by Impact Ionization

Turn-on characteristics of GaAs MESFETs are simulated when the gate and the drain voltages are changed abruptly, and quasi-pulsed I-V curves are derived from them. It is discussed how the slow current transients (lag phenomena) and the pulsed I-V curves are affected by the existence of substrate traps and surface states. It is also discussed how the characteristics are influenced by impact ionization of carriers.

Numerical Modeling of Impact-Ionization Effects on Gate-Lag Phenomena in Gaas Mesfets

Two-dimensional simulation of turn-on characteristics of GaAs MESFETs is performed in which surface states and impact ionization of carriers are considered. It is shown that the gate-lag (or the slow current transient) becomes weaker when including the impact ionization. This is attributed to the fact that the potential profiles along the surface is drastically changed when the surface states capture holes that are generated by impact ionization. The relation between the gate-lag and the so-called kink phenomenon is also discussed.