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Dive into the research topics where Y. Mitani is active.

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Featured researches published by Y. Mitani.


IEEE Transactions on Electron Devices | 2003

Analysis of surface-state and impact-ionization effects on breakdown characteristics and gate-lag phenomena in narrowly recessed gate GaAs FETs

Y. Mitani; D. Kasai; K. Horio

Effects of surface states and recess structures on breakdown characteristics of GaAs MESFETs are studied by two-dimensional (2-D) analysis. It is shown that the breakdown voltage could be raised when moderate densities of surface states are included. However, in a case with relatively high densities of surface states, the breakdown voltage could be drastically lowered when introducing a narrowly recessed gate structure. Effects of impact ionization on gate-lag phenomena in GaAs MESFETs are also studied. It is shown that the gate-lag becomes weaker when including the impact ionization. This is attributed to the fact that the potential profiles along the surface are drastically changed when the surface states capture generated carriers. It is suggested that there is a tradeoff relationship between raising the breakdown voltage and reducing the gate-lag.


IEEE Transactions on Electron Devices | 2002

Analysis of gate-lag phenomena in recessed-gate and buried-gate GaAs MESFETs

A. Wakabayashi; Y. Mitani; K. Horio

Two-dimensional analysis of gate-lag phenomena in recessed-gate and buried-gate GaAs MESFETs is performed, and their dependence on the structural parameters and the off-state gate voltage V/sub Goff/ is studied. It is shown that when V/sub Goff/ is around the threshold voltage (pinchoff voltage) V/sub th/, the gate-lag could be almost eliminated by introducing the buried-gate structure. However, it is suggested that large gate-lag might be seen when V/sub Goff/ is much more negative than V/sub th/.


Journal of Computational Electronics | 2003

Simulation of Lag Phenomena and Pulsed I-V Curves of Compound Semiconductor FETs as Affected by Impact Ionization

Y. Kazami; D. Kasai; Y. Mitani; K. Horio

Turn-on characteristics of GaAs MESFETs are simulated when the gate and the drain voltages are changed abruptly, and quasi-pulsed I-V curves are derived from them. It is discussed how the slow current transients (lag phenomena) and the pulsed I-V curves are affected by the existence of substrate traps and surface states. It is also discussed how the characteristics are influenced by impact ionization of carriers.


international reliability physics symposium | 2002

Physical mechanisms of performance instabilities such as gate-lag and kink phenomena in GaAs MESFETs

Y. Mitani; A. Wakabayashi; K. Horio

Slow current transients during turn-on (gate-lag) and abnormal increases in drain conductance (kink) in GaAs MESFETs are studied by two-dimensional analysis including surface states and impact ionization of carriers. Particularly, it is discussed how the gate-lag is influenced by impact ionization of carriers and how the surface-related kink depends on the structural parameters such as gate length and distance between source and gate.


12th International Conference on Semiconducting and Insulating Materials, 2002. SIMC-XII-2002. | 2002

Effects of surface deep levels on breakdown characteristics of narrowly-recessed-gate GaAs MESFETs

Y. Mitani; A. Wakabayashi; K. Horio

Effects of surface deep levels on breakdown characteristics of nnrrowly-recessedgate GaAs MESFETs are studied by two-dimensional analysis. I t is shown that the breakdown voltage could be raised when moderate densities of surface states are included. However, it is suggested that in n case with relatively high densifies of surface states, the breakdown vollage could be drastically lowered by introducing a narrowly-Tecess=d-g=te structure.


international conference on simulation of semiconductor processes and devices | 2001

Numerical Modeling of Impact-Ionization Effects on Gate-Lag Phenomena in Gaas Mesfets

A. Wakabayashi; Y. Mitani; D. Kasai; K. Horio

Two-dimensional simulation of turn-on characteristics of GaAs MESFETs is performed in which surface states and impact ionization of carriers are considered. It is shown that the gate-lag (or the slow current transient) becomes weaker when including the impact ionization. This is attributed to the fact that the potential profiles along the surface is drastically changed when the surface states capture holes that are generated by impact ionization. The relation between the gate-lag and the so-called kink phenomenon is also discussed.


Vlsi Design | 2001

Simulation of Drastic Lag Phenomena in GaAs-Based FETs for Large Voltage Swing

K. Horio; Y. Mitani; A. Wakabayashi; N. Kurosawa

Turn-on characteristics of GaAs MESFETs and HEMTs are simulated when the gate voltage is changed abruptly. The gate-lag or slow current transient becomes more pronounced when the off-state gate voltage is more negative, because the surface-state effects or substrate-trap effects become more significant. Changes of I–V curves of GaAs MESFETs, when the drain voltage is swept with different speeds, are also simulated. When the swept time is short, the curve shows overshoot-like behavior and the kink disappears, indicating that the I–V characteristics should be quite different between DC and RF conditions.


international workshop on computational electronics | 2000

Simulation of drastic lag phenomena in GaAs-based FETs for large voltage swing

K. Horio; Y. Mitani; A. Wakabayashi; N. Kurosawa

In GaAs MESFETs and HEMTs, slow current transients are often observed experimentally even if the drain voltage or the gate voltage is changed abruptly. They are called drain-lag or gate-lag and could be fatal when the high-speed and high-frequency operation is considered. As for factors of these slow transients, effects of deep traps in the semi-insulating substrate and surface states on the active layer are suggested, but the detailed mechanisms are not well clarified. In this work, we have made transient simulations of GaAs MESFETs and AlGaAs/GaAs HEMTs when the gate voltage or the drain voltage is swung significantly, and showed that the lag phenomena become very pronounced for larger changes of the voltages. This indicates that I-V characteristics should be quite different between DC and RF conditions and the lag phenomena should be considered in the modeling of GaAs-based power devices.


2002 International Conference on Modeling and Simulation of Microsystems - MSM 2002 | 2002

Two-dimensional simulation of surface-state effects on breakdown characteristics of narrowly-recessed-gate GaAs MESFETs

Y. Mitani; A. Wakabayashi; K. Horio


Proceedings of the 11th European Gallium Arsenide & Other Semiconductor Application Symposium (GAAS 2003), Munich, Germany | 2003

Physics-Based Device Simulation of Lag and Power Compression in GaAs FETs

D. Kasai; Y. Kazami; Y. Mitani; K. Horio

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K. Horio

Shibaura Institute of Technology

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A. Wakabayashi

Shibaura Institute of Technology

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D. Kasai

Shibaura Institute of Technology

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Y. Kazami

Shibaura Institute of Technology

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N. Kurosawa

Shibaura Institute of Technology

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