D. May

Double-sided cooling and thermo-electrical management of power transients for silicon chips on DCB-substrates for converter applications: Design, technology and test

This paper deals with the system design, technology and test of a novel concept of integrating Si and SiC power dies along with thermo-electric coolers in order to thermally manage transients occurring during operation. The concept features double-sided cooling as well as new materials and joining technologies to integrate the dies such as transient liquid phase bonding/soldering and sintering. Coupled-field simulations are used to predict thermal performance and are verified by especially designed test stands to very good agreement. This paper is the second in a series of publications on the ongoing work.

Thermal characterization of highly conductive die attach materials

This paper deals with the development of a new test stand for determination the thermal conductivity of metals, semiconductors, highly conductive die attaches and substrates using the steady state technique. We designed the test stand and optimized it by FE simulation to have flexibility for the selection of the sample size and measurement parameters. We determine the thermal conductivity from the measured thermal resistance and the geometries of the measured samples. To measure the thermal resistance by steady state techniques one need a hot source and a heat sink. Putting the sample between these hot source and sink, so the sample will be flowed by heat and temperature gradient across the sample will be generated. The temperature gradient across the sample is measured by a thermal imaging system. The input and the output heat flow are measured by metal based heat flow sensors (HFS) which is a metal socket with integrated high precise temperature sensors. To determine the exact heat flow through the sample we analysed the heat loss by radiation and convection by a case study and calculated a correction factor for the heat flow. Different solder and die attach materials as well as metals and highly conductive substrates have been measured by the new test stand. Selected results will be presented in this paper in order to demonstrate the functionality and the accuracy of the new test stand.

LaTIMA an innovative test stand for thermal and electrical characterization of highly conductive metals, die attach, and substrate materials

This paper deals with the development of an innovative test stand for the measurement of thermal and electrical conductivity of metals, semiconductors, highly conductive die attaches and substrates using the steady state technique for thermal characterization and four-terminal sensing with pulse delta technique for electrical characterization. We present a systematic study of sintered silver in order to investigate the influence of sintering conditions on thermal and electrical properties. Several sintered silver samples have been prepared under sintering temperature variation between 200°C and 270°C and sintering pressure variation between 5 MPa and 25 MPa. The characterization results diversify up to 200% for thermal conductivity and up to 330% for electrical conductivity. The Wiedemann-France law describes the relationship between electrical and thermal conductivities for bulk metals. We proved that this law applies not only for bulk metal but also for porous sintered metal.

Development and fabrication of a thin film thermo test chip and its integration into a test system for thermal interface characterization

This paper deals with the development und fabrication of a thermal test chip (TTC) to be used for thermal characterisation and qualification of materials and packages. The TTC is designed as a modular chip with the smallest full functional chip cell of 3.2mm × 3.2mm and consists of a heater structure and a temperature sensor. The chips can be applied in any required matrix. Heater and temperature sensors are realised by a 70 nm single Titanium layer as adhesion and barrier layer. The Titanium is structured a on 670μm silicon wafer by the cost efficient thin film technology. 3×3 matrix chips have been sawn, assembled on a FR4 substrate by flip chip technology and integrated into a test stand for characterisation of thermal interface materials (TIMA Tester). The calibration curves of the temperature sensors show 4-time higher sensitivity then Si diodes. The homogeneity of the surface temperature was checked by the Lock-In infra-red thermography and compared with a commercial thermo test chip.

In-situ monitoring of interface delamination by local thermal transducers exemplified for a flip-chip package

We have developed a novel, rapid, robust and non-destructive experimental technique for in-situ monitoring of delamination of interfaces for electronic packages. The method is based on a simple thermal transducer matrix of so-called THIXELS (thermal pixels) which allows a spatially resolved real-time image of the current status of delamination. The transducers are small metal wire meanders which are driven and electrically read out using the well-known 3-omega method. This method has special advantages over other thermal contrast methods with respect to robustness, sensitivity and signal-to-noise ratio. Notable is the absence of cross-effects. The proof of concept has been furnished on an industry-grade flip-chip package with underfill on an organic substrate. The technique is especially powerful for buried interfaces, where time-honoured methods like scanning acoustic microscopy (SAM) cannot be applied. As the technique effectively performs a thermal diffusivity sensitive scan, it may not only be useful for stress testing during package qualification, but sensor applications on other fields of health monitoring seem also possible.

Double-sided cooling and transient thermo-electrical management of Silicon on DCB assemblies for power converter modules: Design, technology and test

This paper deals with the system design, technology and test of a novel concept of integrating Silicon power dies along with thermo-electric coolers and a phase change heat buffer in order to thermally manage transients occurring during operation. The concept features double-sided cooling as well as new materials and joining technologies to integrate the dies such as transient liquid phase bonding/soldering and sintering. Coupled-field simulations are used to predict thermal performance and are verified by especially designed test stands to very good agreement.

Non-destructive in-situ monitoring of delamination of buried interfaces by a thermal pixel (Thixel) chip

We have developed a novel, rapid, robust and non-destructive experimental technique for in-situ monitoring of delamination of interfaces for electronic packages. The method is based on a simple thermal transducer matrix of so-called THIXELS (thermal pixels) which allows a spatially resolved real-time image of the current status of delamination. The transducers are small metal wire meanders which are driven and electrically read out using the well-known 3-omega method. This method has special advantages over other thermal contrast methods with respect to robustness, sensitivity and signal-to-noise ratio. Notable is the absence of cross-effects. The proof of concept has been furnished on an industry-grade flip-chip package with underfill on an organic substrate. The technique is especially powerful for buried interfaces, where time-honoured methods like scanning acoustic microscopy (SAM) cannot be applied. As the technique effectively performs a thermal diffusivity sensitive scan, it may not only be useful for stress testing during package qualification, but sensor applications on other fields of health monitoring seem also possible.

Thermo — Mechanical characterization and reliability modelling of sintered silver based thermal interface materials

Within this paper, we present a guideline for the mechanical acceleration of reliability experiments for end-of-lifetime prognostics of metal based die attach materials. First, we used an advanced hybrid nano-effect sintered silver layer as interface between die and substrate which has very good electrical and thermal conductivities. Two pairs ofexperiment/simulation are scheduled. An isothermal mechanical 3-pt bending experiment to induce fatigue the specimens rapidly as well as a thermal induced strain fatigue by thermal chamber for validation. The manufactured specimens are designed to be used for both. With a FEM of this subsystem to simulate the failure parameter which is the accumulated von Mises strain, lifetime modelling can be performed.

IR pulse thermography as failure analytical tool applied to die attach processes

New die attach technologies are necessary to meet the demand for faster and more reliable power electronic devices. Technologies based on sintering such as silver sintering and silver sinter adhesives are currently in the focus of technology development because of their high strength and very high thermal performance. To ensure the reliability of such a die attach reliable, fast and non-destructive failure analysis (FA) are needed. Transient thermal methods (TTM) provide techniques for detection of different types of defects such as delaminations of interfaces, cracks, electrical short circuits and voids in die attach layer [1]-[3]. In this work, pulse thermography (PT), one of the TTMs, was successfully used for nondestructive testing of the die attach layers under industrial conditions. We have studied the physical principles and presented fundamental possibilities and limitations given by formulas, nomograms and parameter sensitivity studies. Finally, we demonstrate the PT as accompanying FA to process qualification of a sintered silver adhesive process.

Phase change based thermal buffering of transient loads for power converter

This paper deals with the system design, technology and test of a novel concept of integrating silicon power dies along with thermo-electric coolers and a phase change heat buffer in order to thermally manage transients occurring during operation. The innovative power-electronics concept features double-sided cooling as well as new materials and joining technologies to integrate the dies such as transient liquid phase bonding/soldering and sintering. To avoid a cold plate at the backside, a new low-cost, low-footprint thermal storage device has been developed and optimized by simulation to meet the requirements given by this application. Coupled-field simulations are used to predict thermal performance and are being verified by especially designed test stands.