D. Petrantonakis

40-Gb/s All-Optical Processing Systems Using Hybrid Photonic Integration Technology

This paper presents an experimental performance characterization of all-optical subsystems at 40 Gb/s using interconnected hybrid integrated all-optical semiconductor optical amplifier (SOA) Mach-Zehnder interferometer (MZI) gates and flip-flop prototypes. It was shown that optical gates can be treated as generic switching elements and, when efficiently interconnected, can form larger and more functional network subsystems. Specifically, this paper reports on all-optical subsystems capable of performing on-the-fly packet clock recovery, 3R regeneration, label/payload separation, and packet routing using the wavelength domain. The all-optical subsystems are capable of operating with packet-mode traffic and are suitable for all-optical label-switched and self-routed network nodes. The intelligent functionality offered, combined with the compactness and stability of the optical gates, verifies the potential that all-optical technology can find application in future data-centric networks with efficient and dynamic bandwidth utilization. This paper also reports on the latest photonic integration breakthroughs as a potential migration path for reducing fabrication cost by developing photonic systems-on-chip utilizing multiple SOA-MZI optical gates on a single chip

All-Optical 3R Burst-Mode Reception at 40 Gb/s Using Four Integrated MZI Switches

We demonstrate an all-optical retime, reshape, reamplify (3R) burst-mode receiver (BMR) operating error-free with a 40-Gb/s variable-length asynchronous optical data packets that exhibit up to 9-dB packet-to-packet power variation. The circuit is completely based upon hybrid integrated Mach-Zehnder interferometric (MZI) switches as it employs four cascaded MZIs, each one performing a different functionality. The 3R burst-mode reception is achieved with the combination of two discrete all-optical subsystems. A reshape, reamplify BMR employing a single MZI is used first to perform power equalization of the incoming bursts and provide error-free data reception. This novel approach is experimentally demonstrated to operate error-free, even for a 9-dB dynamic range of power variation between bursty data packets and for a wide range of average input power. The obtained power-equalized data packets are then fed into a 3R regenerator to improve the signal quality by reducing the phase and amplitude jitter of the incoming data. This packet-mode 3R regenerator employs three MZIs that perform wavelength conversion, clock extraction, and data regeneration for every packet separately and operates at 40 Gb/s, exhibiting rms timing jitter reduction from 4 ps at the input to 1 ps at the output and a power penalty improvement of 2.5 dB

Enabling Tb/s Photonic Routing: Development of Advanced Hybrid Integrated Photonic Devices to Realize High-Speed, All-Optical Packet Switching

We present recent advances in photonic integration introduced by integration-related European research project IST-MUFINS. The contribution of the project in the progress of a functional photonic integration is outlined, from device fabrication to device application focusing on photonic routing using multielement photonic chips. Specifically, we report on the transition from single-element to multielement photonic devices with the fabrication of hybrid integrated arrays of optical switches exploiting and upgrading the silica-on-silicon hybrid photonic integration. We demonstrate how the enhanced processing power and capacity of these components can be exploited to implement key functionalities required in next-generation fully integrated terabits per second photonic routers.

Microring-Resonator-Assisted, All-Optical Wavelength Conversion Using a Single SOA and a Second-Order Si

We present the first microring-resonator-assisted wavelength converter employing a semiconductor optical amplifier and a tunable, Si3N4-SiO2 microring-resonator-reconfigurable optical add-drop multiplexer. We demonstrate inverted, noninverted, and wavelength-division-multiplexing-enabled wavelength conversion with low power penalties.

_{3}

We demonstrate a wavelength-converter-based optical time-slot-interchanger. It consists of three cascaded programmable delay stages and employs the first hybrid integrated, on a chip, quadruple array of semiconductor optical amplifier Mach-Zehnder interferometer switches. It exhibits error-free operation with 10-Gb/s nonreturn-to-zero packets and a power penalty of 1.8 dB.

N

We demonstrate an all-optical label/payload separation circuit implemented with hybridly integrated semiconductor-optical-amplifier-based Mach-Zehnder switches. It is shown to operate error-free with 40-Gb/s variable length data packets containing 27-1 pseudorandom bit sequence and short guardbands between them. The circuit requires only the data packets as input and its complexity does not increase with label length

_{4}

We demonstrate an all-optical four-wavelength 3R burst mode regenerator, operating error-free with 10-Gb/s variable length data packets that exhibit 6-dB packet-to-packet power variation. The circuit was implemented using a sequence of three integrated quadruple semiconductor optical amplifier-based Mach-Zehnder interferomentric arrays.

–SiO

We present for the first time a quadruple array of MZI switches hybrid integrated on a single chip and package used to perform error-free clock, data recovery and label extraction for 40 Gb/s packets.

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We demonstrate an all-optical 3R burst mode regenerator operating error-free with 40-Gb/s data packets. It is comprised of a sequence of four hybridly integrated semiconductor optical amplifier Mach-Zehnder interferometric switches and is shown to operate with short, variable length and asynchronous data packets, with a dynamic range of 9.3 dB

ROADM

We demonstrate an optical static RAM cell that comprises two SOA-based switches and an integrated SOA-MZI flip-flop, providing random access read/write functionality at 5 Gb/s.