D. Python

A micropower class-AB CMOS log-domain filter for DECT applications

This paper presents a micropower 2nd-order low-pass filter using the log-domain principle and integrated in a 0.35 µm CMOS process. It has been designed as an anti-aliasing filter for a DECT transceiver with a 45 kHz nominal cut-off frequency. The circuit uses transistors biased in weak inversion without requiring separate wells. It operates at 1.5V supply voltage and its current consumption is 8 µA in idle mode. The log-filter is implemented with an on-chip conditioner which allows for class AB operation. It can process input currents at 5 kHz that are 25 times larger than the 200 nA nominal current. Measurements up to 500 times the bias current have been done, since at 1 kHz the current input is only limited by strong inversion and by the supply voltage.

Low-voltage log-domain signal processing in CMOS and BiCMOS

This paper presents the most important properties of log-domain filters for the realization of low-voltage and low power analog signal processing circuits. The noise behavior is discussed and the advantage of the combination of companding and class AB operation is highlighted. Examples of BiCMOS and CMOS realizations operating at supply voltages as low as 1 V are presented.

A 1-V CMOS log-domain integrator

A novel circuit implementation of a CMOS log-domain integrator is presented. Unlike most other implementations, it does not require placing of MOSFETs in separated wells, and therefore allows very compact filters, which are fully compatible with modern standard CMOS technologies. Besides the saving of chip area, this also helps to reduce parasitic capacitances. The most important advantage of this circuit is the very low minimum required supply voltage of only two saturation voltages plus one gate-to-source voltage of a weakly inverted MOSFET. This is fully compatible with the minimum required supply voltage of digital gates implemented in the same technology. The integrator was used as a building block for a 5th-order Bessel filter, which was simulated with the transistor parameters of a 0.5 /spl mu/m CMOS technology.

A 1.2 V companding current-mode integrator for standard digital CMOS processes

A low-voltage current-mode integrator using voltage companding and operating in class AB is presented. The integrator is made only with transistors without any functional capacitors and is therefore suited to the integration in a digital CMOS process. It has been used in a 4th-order Tchebycheff low-pass filter which can be tuned from 20 Hz to 20 kHz and achieves total harmonic distortions smaller than 1% for input currents smaller than 10 times the bias current. The dynamic range is typically 55 dB and the power consumption is 1.16 /spl mu/W for a cut-off frequency of 5 kHz.

An antialiasing filter using complementary MOS transconductors biased in the triode region

A new low-voltage and low-power g/sub m/-C filter topology based on complementary MOS transconductors biased in the triode region is proposed. It requires a new bias circuit in order to match the transconductances of the PMOS and the NMOS transconductors. This new technique has been used to design a 2/sup nd/-order antialiasing filter for the transmit path of cordless telephone application. It performs with a high dynamic range of 73 dB and a low power consumption of 25 /spl mu/W.

A new BiCMOS low-voltage and low-distortion OTA for continuous-time filters

This paper presents a new BiCMOS OTA based on MOS transistors operating in the triode-region. The THD of the proposed OTA is smaller than -63 dB for an input voltage up to 2 Vp-p at 3 V supply voltage. The Common-Mode (CM) stabilization systems, combining both CM Feed Forward and CM Feed Back circuits are also presented. Simulated results of a second-order filter designed using the proposed OTA are given.