Eric A. Vittoz

An analytical MOS transistor model valid in all regions of operation and dedicated to low-voltage and low-current applications

A fully analytical MOS transistor model dedicated to the design and analysis of low-voltage, low-current analog circuits is presented. All the large- and small-signal variables, namely the currents, the transconductances, the intrinsic capacitances, the non-quasi-static transadmittances and the thermal noise are continuous in all regions of operation, including weak inversion, moderate inversion, strong inversion, conduction and saturation. The same approach is used to derive all the equations of the model: the weak and strong inversion asymptotes are first derived, then the variables of interest are normalized and linked using an appropriate interpolation function. The model exploits the inherent symmetry of the device by referring all the voltages to the local substrate. It is shown that the inversion chargeQinv′ is controlled by the voltage differenceVP − Vch, whereVch is the channel voltage, defined as the difference between the quasi-Fermi potentials of the carriers. The pinch-off voltageVP is defined as the particular value ofVch such that the inversion charge is zero for a given gate voltage. It depends only on the gate voltage and can be interpreted as the equivalent effect of the gate voltage referred to the channel. The various modes of operation of the transistor are then presented in terms of voltagesVP − VS andVP − VD. Using the charge sheet model with the assumption of constant doping in the channel, the drain currentID is derived and expressed as the difference between a forward componentIF and a reverse componentIR. Each of these is proportional to a function ofVP − VS, respectivelyVP − VD, through a specific currentIS. This function is exponential in weak inversion and quadratic in strong inversion. The current in the moderate inversion region is then modelled by using an appropriate interpolation function resulting in a continuous expression valid from weak to strong inversion. A quasi-static small-signal model including the transconductances and the intrinsic capacitances is obtained from an accurate evaluation of the total charges stored on the gate and in the channel. The transconductances and the intrinsic capacitances are modelled in moderate inversion using the same interpolation function and without any additional parameters. This small-signal model is then extended to higher frequencies by replacing the transconductances by first order transadmittances obtained from a non-quasi-static calculation. All these transadmittances have the same characteristic time constant which depends on the bias condition in a continuous manner. To complete the model, a general expression for the thermal noise valid in all regions of operation is derived. This model has been successfully implemented in several computer simulation programs and has only 9 physical parameters, 3 fine tuning fitting coefficients and 2 additional temperature parameters.

CMOS analog integrated circuits based on weak inversion operations

A simple model describing the DC behavior of MOS transistors operating in weak inversion is derived on the basis of previous publications. This model includes only two parameters and is suitable for circuit design. It is verified experimentally for both p- and n-channel test transistors of a Si-gate low-voltage CMOS technology. Various circuit configurations taking advantage of weak inversion operation are described and analyzed: two different current references based on known bipolar circuits, an amplitude detector scheme which is then applied to a quartz oscillator with the result of a very low-power consumption (<0.1 /spl mu/W at 32 kHz), and a low-frequency bandpass amplifier. All these circuits are insensitive to threshold and mobility variations, and compatible with a CMOS technology dedicated to digital low-power circuits.

High-performance crystal oscillator circuits: theory and application

A general theory that allows the accurate linear and nonlinear analysis of any crystal oscillator circuit is presented. It is based on the high Q of the resonator and on a very few nonlimiting assumptions. The special case of the three-point oscillator, that includes Peirce and one-pin circuits, is analyzed in more detail. A clear insight into the linear behavior, including the effect of losses, is obtained by means of the circular locus of the circuit impedance. A basic condition for oscillation and simple analytic expressions are derived in the lossless case for frequency pulling, critical transconductance, and start-up time constant. The effects of nonlinearities on amplitude and on frequency stability are analyzed. As an application, a 2-MHz CMOS oscillator which uses amplitude stabilization to minimize power consumption and to eliminate the effects of nonlinearities on frequency is described. The chip, implemented in a 3- mu m p-well low-voltage process, includes a three-stage frequency divider and consumes 0.9 mu A at 1.5 V. The measured frequency stability is 0.05 p.p.m./V in the range 1.1-5 V of supply voltage. Temperature effect on the circuit itself is less than 0.1 p.p.m. from -10 to +60 degrees C. >

The Design of High-Performance Analog Circuits on Digital CMOS Chips

Devices available in digital oriented CMOS processes are reviewed, with emphasis on the various modes of operation of a standard transistor and their respective merits, and on additional specifications required to apply devices in analog circuits. Some basic compatible analog circuit techniques and their related tradeoffs are then surveyed by means of typical examples. The noisy environment due to cohabitation on the chip with digital circuits is briefly evoked.

Charge injection in analog MOS switches

Charge injection in MOS analog switches, also called pass transistors or transmission gates, is approached by using the continuity equation. Experimental results show the negligible influence of substrate current which leads to a unidimensional model. An easy-to-handle simplified model is deduced and its predictions compared to the injection obtained by measurements. It is shown that this model, which can be used to implement various strategies to reduce charge injection, is valid in any realistic situation.

Adaptive biasing CMOS amplifiers

Two transconductance amplifiers are presented in which the concept of an input dependent bias current has been introduced. As a result, these amplifiers combine a very low standby power dissipation with a high driving capability. The first amplifier, suited for SC filters, is fairly small (0.075 mm/SUP 2/) and has a slew rate which is more than an order of magnitude better than micropower amplifiers presented earlier. The second amplifier can be used as a micropower buffer. Nearly the whole supply current is used to charge the load capacitor so that this amplifier has a high efficiency.

Low-power design: ways to approach the limits

For the vast majority of VLSI-based electronic systems, including most of the computer and telecommunication products, low power consumption has been close to last in the list of specifications. Technology improvements and design cleverness have been devoted mostly to reaching higher speed and higher precision. In recent years, there has been a sudden change driven mainly by an urgent need for portability, but also by concerns about the growing relative cost of power supplies and of heat removal systems, and even about limits of power available from the local network. It has now become necessary to build new products with at least the same performance in speed and dynamic range, but with stringent requirements on low power. This raises questions about the limits and how they can be approached.<<ETX>>

A CMOS chopper amplifier

This paper presents a CMOS chopper amplifier realized with a 2nd order low-pass selective amplifier, using continuous-time filtering technique. The circuit has been integrated in a 3 ¿m p-well low-voltage CMOS technology. The chopper DC gain is 32 dB with 200 Hz bandwidth. The equivalent low-frequency input noise is 63 nV/¿Hz and free from 1/f noise. The input offset is typically 5 ¿V. The amplifier consumes only 34 ¿W and is therefore well suited for biomedical applications, like electrogram amplification.

Design of high-Q varactors for low-power wireless applications using a standard CMOS process

New applications such as wireless integrated network sensors (WINS) require radio-frequency transceivers consuming very little power compared to usual mainstream applications, while still working in the ultra-high-frequency range. For this kind of application, the LC-tank-based local oscillator remains a significant contributor to the overall receiver power consumption. This statement motivates the development of good on-chip varactors available in a standard process. This paper describes and compares the available solutions to realize high-Q, highly tunable varactors in a standard digital CMOS submicrometer process. On this basis, quality factors in excess of 100 at 1 GHz, for a tuning ratio reaching two, have been measured using a 0.5-/spl mu/m process.

Future of analog in the VLSI environment

It is argued analog circuits will remain irreplaceable for the implementation of the interface circuitry between digital processing and the external world. Most of their characteristics can be improved with scaled-down processes. Analog circuits will also compete with digital and will remain advantageous for low precision signal processing. Since little precision is required to carry out many cognitive tasks, analog VLSI (very-large-scale integration) will dominate in the implementation of many types of neural networks.<<ETX>>