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Dive into the research topics where D.S. Macintyre is active.

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Featured researches published by D.S. Macintyre.


Microelectronic Engineering | 2003

Arrays of nano-dots for cellular engineering

Nikolaj Gadegaard; S. Thomas; D.S. Macintyre; K.F. McGhee; J.O. Gallagher; B.G. Casey; Chris D. W. Wilkinson

Efficient patterning of large areas with nanometre features is required for cellular engineering applications. The final product must be made at an economic cost. 100 nm diameter pits on a 300 nm pitch have shown to be non-adhesive to a range of different mammalian cells. A strategy is described which uses an electron beam lithographic tool with focussed Gaussian beam to define shapes directly. Features as small as 20 nm in diameter on 100 nm pitch were fabricated. It was found that focus of 20 nm spot size is critical. The effect of deflection aberrations across the writing field was investigated. Various resists have been examined. Patterns were successfully embossed in poly(caprolactone). The overall cost of a die in terms of machine time has been significantly reduced.


international electron devices meeting | 2007

High Mobility III-V MOSFETs For RF and Digital Applications

Matthias Passlack; Peter Zurcher; K. Rajagopalan; R. Droopad; Jonathan K. Abrokwah; M. Tutt; Y.-B. Park; E. Johnson; O. Hartin; A. Zlotnicka; P. Fejes; R.J.W. Hill; David A. J. Moran; Xu Li; H. Zhou; D.S. Macintyre; S. Thorns; Asen Asenov; K. Kalna; I.G. Thayne

Developments over the last 15 years in the areas of materials and devices have finally delivered competitive III-V MOSFETs with high mobility channels. This paper briefly reviews the above developments, discusses properties of the GdGaO/ Ga2O3 MOS systems, presents GaAs MOSFET DC and RF data, and concludes with an outlook for high indium content channel MOSFETs. GaAs based MOSFETs are potentially suitable for RF power amplification, switching, and front-end integration in mobile and wireless applications while MOSFETs with high indium content channels are of interest for future CMOS applications.


Journal of Vacuum Science & Technology B | 2004

Direct imprint of sub-10 nm features into metal using diamond and SiC stamps

K.A. Lister; S. Thoms; D.S. Macintyre; C. D. W. Wilkinson; J. M. R. Weaver; B.G. Casey

We demonstrate the transfer of sub-10nm features into nickel using a hard stamp. Nanostructures were transferred directly from diamond and SiC in a single step by pressing the stamp into nickel at room temperature. The patterns were generated using ultrahigh resolution electron beam lithography. Patterns were transferred to the diamond and SiC using RIE etching with an O2 plasma used for the diamond and a SF6+O2 mixture used for the SiC. Hydrogen Silsesquioxane was used as a resist and served as a mask in the plasma etching.


Microelectronic Engineering | 1998

The fabrication of high resolution features by mould injection

D.S. Macintyre; S. Thoms

This paper describes work carried out to develop a relatively simple procedure to mass produce high resolution and large area features in polymer by mould injection. Fabrication of the injection mould using high resolution electron beam lithography is described and the results of production runs evaluated. Feature sizes of less than 100 nm were obtained and 4 centimetre long 1:1 gratings with periods down to 1μm produced. Features with high aspect ratio proved difficult to form routinely however it is envisaged that further optimisation of the process will resolve these difficulties. It is our belief that the ultimate resolution of this technique is limited largely by the quality of mould tool manufacturing.


IEEE Electron Device Letters | 2011

Electron Mobility in Surface- and Buried-Channel Flatband

S. Bentley; M. Holland; Xu Li; G. W. Paterson; H. Zhou; Olesya Ignatova; D.S. Macintyre; S. Thoms; Asen Asenov; Byungha Shin; Jaesoo Ahn; Paul C. McIntyre; I.G. Thayne

In this letter, we investigate the scaling potential of flatband III-V MOSFETs by comparing the mobility of surface and buried-channel In<sub>0.53</sub>Ga<sub>0.47</sub>As devices employing an atomic layer-deposited Al<sub>2</sub>O<sub>3</sub> gate dielectric and a delta-doped InGaAs/InAlAs/InP heterostructure. Peak electron mobilities of 4300 cm<sup>2</sup>/V · s and 6600 cm<sup>2</sup>/V · s at a carrier density of 3 × 10<sup>12</sup> cm<sup>-2</sup> were determined for the surfaceand buried-channel structures, respectively. In contrast to similarly scaled inversion-channel devices, we find that the mobility in surface channel flatband structures does not drop rapidly with the electron density, but rather high mobility is maintained up to carrier concentrations around 4 × 10<sup>12</sup> cm<sup>-2</sup> before slowly dropping to around 2000 cm<sup>2</sup>/V · s at 1 × 10<sup>13</sup> cm<sup>-2</sup>. We believe these to be world leading metrics for this material system and an important development in informing the III-V MOSFET device architecture selection process for the future low-power highly scaled CMOS.


IEEE Electron Device Letters | 2011

\hbox{In}_{0.53}\hbox{Ga}_{0.47}\hbox{As}

S. Bentley; M. Holland; Xu Li; G. W. Paterson; H. Zhou; Olesya Ignatova; D.S. Macintyre; S. Thoms; A. Asenova; Byungha Shin; Jaesoo Ahn; Paul C. McIntyre; I.G. Thayne

In this letter, we investigate the scaling potential of flatband III-V MOSFETs by comparing the mobility of surface and buried-channel In<sub>0.53</sub>Ga<sub>0.47</sub>As devices employing an atomic layer-deposited Al<sub>2</sub>O<sub>3</sub> gate dielectric and a delta-doped InGaAs/InAlAs/InP heterostructure. Peak electron mobilities of 4300 cm<sup>2</sup>/V · s and 6600 cm<sup>2</sup>/V · s at a carrier density of 3 × 10<sup>12</sup> cm<sup>-2</sup> were determined for the surfaceand buried-channel structures, respectively. In contrast to similarly scaled inversion-channel devices, we find that the mobility in surface channel flatband structures does not drop rapidly with the electron density, but rather high mobility is maintained up to carrier concentrations around 4 × 10<sup>12</sup> cm<sup>-2</sup> before slowly dropping to around 2000 cm<sup>2</sup>/V · s at 1 × 10<sup>13</sup> cm<sup>-2</sup>. We believe these to be world leading metrics for this material system and an important development in informing the III-V MOSFET device architecture selection process for the future low-power highly scaled CMOS.


Journal of Vacuum Science & Technology B | 1999

MOSFETs With ALD

Y. Chen; D.S. Macintyre; S. Thoms

A new process has been developed to fabricate T-shaped gates and Γ-shaped gates for high performance metal–semiconductor field effect transistors and high electron mobility transistors using a bilayer of Shipley UVIII DUV resist and poly(methylmethacrylate). The two resists are separated by a 20–30 nm thick layer of aluminum and after patterning by electron beam lithography a two-stage development technique is used to remove the aluminum and to produce well-defined resist profiles. The process can be used to fabricate T-shaped and Γ-shaped gates with footwidth sizes as small as 50 nm and headwidth to footwidth ratios in excess of 40:1 for T gates and 35:1 for Γ gates. The ability to fabricate gates with these dimensions arises from the fact that the UVIII resist is considerably more sensitive to electron beam exposure than PMMA. Further benefits derived from using a UVIII: PMMA bilayer are better control of footwidth dimensions and shorter electron beam patterning times compared to bilayers of PMMA with c...


Journal of Vacuum Science & Technology B | 2001

\hbox{Al}_{2}\hbox{O}_{3}

D.S. Macintyre; Y. Chen; D. Lim; S. Thoms

Nanoimprint lithography is capable of patterning substrates with high definition patterns at relatively high patterning speeds. In this article we describe the fabrication of high resolution “T” gate resist profiles by imprint lithography. The fabrication of high resolution stamping tools and the imprinting process itself are critical to the success or failure of this technique and they are described in the article. Two different techniques were used to fabricate stamping tools. The first involved pattern definition by high resolution electron beam lithography followed by electroforming. The second involved pattern definition by electron beam lithography followed by a two stage silicon etching process. Imprinted T gate resist profiles with footwidths less than 100 nm in length were obtained on gallium arsenide substrates for the purpose of producing metallized gates for a self-aligned gate process.


Journal of Applied Physics | 2014

Gate Dielectric

Ata Khalid; Geoff Dunn; R.F. Macpherson; S. Thoms; D.S. Macintyre; Chong Li; M. J. Steer; V. Papageorgiou; I.G. Thayne; M. Kuball; C. H. Oxley; M. Montes Bajo; A. Stephen; James Glover; David R. S. Cumming

The length of the transit region of a Gunn diode determines the natural frequency at which it operates in fundamental mode—the shorter the device, the higher the frequency of operation. The long-held view on Gunn diode design is that for a functioning device the minimum length of the transit region is about 1.5 μm, limiting the devices to fundamental mode operation at frequencies of roughly 60 GHz. Study of these devices by more advanced Monte Carlo techniques that simulate the ballistic transport and electron-phonon interactions that govern device behaviour, offers a new lower bound of 0.5 μm, which is already being approached by the experimental evidence that has shown planar and vertical devices exhibiting Gunn operation at 600 nm and 700 nm, respectively. The paper presents results of the first ever THz submicron planar Gunn diode fabricated in In0.53Ga0.47As on an InP substrate, operating at a fundamental frequency above 300 GHz. Experimentally measured rf power of 28 μW was obtained from a 600 nm lo...


Microelectronic Engineering | 1997

Electron mobility in surface- and buried- channel flatband In 0.53 Ga 0.47 As MOSFETs with ALD Al 2 O 3 gate dielectric.

D.S. Macintyre; S. Thoms

Abstract The electron beam exposure characteristics of two new Shipley DUV photoresists, UVIII and UVN have been investigated. UVIII is a positive resist which gives good linewidth control down to 100 nm lines and spaces with 60 nm features being possible at a dose of 40 μC/cm 2 and a beam voltage of 50 kV. UVN is a negative resist with a sensitivity of 20 μC/cm 2 at 50 kV which gives much poorer dimensional control and has an ultimate resolution of 70 nm isolated lines or 140 nm lines and spaces.

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S. Thoms

University of Glasgow

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Xu Li

University of Glasgow

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H. Zhou

University of Glasgow

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Y. Chen

University of Glasgow

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