D. Trevisan
University of Udine
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Publication
Featured researches published by D. Trevisan.
IEEE Transactions on Industrial Electronics | 2008
Luca Corradini; Paolo Mattavelli; Elisabetta Tedeschi; D. Trevisan
This paper investigates multi sampled digitally controlled switched-mode power supplies with switching ripple compensation. In digital controllers for power converters, the main bandwidth limitations come from A/D conversion time, computational delays, and small-signal delay of the digital pulsewidth modulator (DPWM). In hard-wired digital-controller technologies, such as in dedicated digital IC and/or in field-programmable gate arrays (FPGAs), the calculation delays can be made negligible with respect to the switching period; thus, when fast ADCs are used, the overall phase lag is dominated by the DPWM. The multi sampling approach can strongly reduce the DPWM delay, thus breaking the bandwidth limitations of conventional single-sampled solutions. In this paper, the additional aliasing effects, which would require a filtering action, are avoided, exploiting the periodic nature of the switching ripple under steady-state conditions using a repetitive-based filtering action. Simulation and experimental results on a 1.2-V-10-A 500-kHz synchronous buck converter, where the digital control has been implemented in the FPGA, confirm the properties of the proposed solution.
IEEE Transactions on Industrial Electronics | 2008
D. Trevisan; Paolo Mattavelli; Paolo Tenti
This paper investigates the application of digital control for non-isolated single-inductor multiple-output step-down dc-dc converters operating in continuous-conduction mode. The accurate and independent control of each output requires a sophisticated digital control architecture so as to minimize the cross-regulation problem. The adopted control includes a separate regulation for common-mode and differential-mode output voltages. Due to the differential-mode control loop dependence on the load current, a variable-gain functional block has been investigated; this provision keeps the differential-mode loop gain constant under different load conditions. Moreover, a nonlinear evaluation of the common-mode voltage has been investigated in order to improve the system dynamic response to asymmetrical load changes. Even if aimed at an integrated solution, experimental verifications have been performed using discrete components, implementing the digital control in a field-programmable gate array. Simulation results on a three-output converter and experimental results on dual-output converter (Vin = 2.5 4divide5 V, Vo1 = Vo2 = 0.9divide1.5 V, and Ioperp = Io2 = 0 4divide0.6 A) confirm the proposed analysis.
IEEE Transactions on Power Electronics | 2007
Stefano Saggini; D. Trevisan; Paolo Mattavelli; Massimo Ghioni
This paper investigates a mixed synchronous/asynchronous digital voltage-mode controller for DC-DC converters. In the proposed control architecture, the turn-on switching event is determined asynchronously by comparing the converter output voltage and a synchronously generated voltage ramp driven by the digital control using a low-resolution digital-to-analog converter. Switch turn-off is determined synchronously by the system clock. In the proposed approach, the derivative action of the proportional-integral-derivative voltage-mode controller is inherently obtained by the frequency modulation, without requiring the digital computation of the derivative action. A simplified small-signal model is also derived in order to analyze the performance achievable by the proposed solution. This control architecture features good dynamic performance, and frequency modulation during transients. Simulation and experimental results on a synchronous buck converter, where the digital control has been implemented in field programmable gate array, confirm the effectiveness of the proposed solution.
applied power electronics conference | 2006
D. Trevisan; Paolo Mattavelli; S. Saggini; Giovanni Garcea; Massimo Ghioni
This paper investigates a mixed synchronous/asynchronous digital voltage-mode controller for dc-dc converters. In the proposed control architecture, the turn-on switching event is determined asynchronously by comparing the converter output voltage and a synchronously generated voltage ramp driven by the digital control using a low-resolution digital-to-analog converter (DAC). Switch turn-off is determined synchronously by the system clock. In the proposed approach, the derivative action of the proportional-integral-derivative (PID) voltage-mode controller is inherently obtained by the frequency modulation, without requiring the digital computation of the derivative action. A simplified small-signal model is also derived in order to analyze the performance achievable by the proposed solution. This control architecture features good dynamic performance, frequency modulation during transients and small quantization effects. Simulation and experimental results on a synchronous buck converter, where the digital control has been implemented in field programmable gate array (FPGA), confirm the effectiveness of the proposed solution
conference of the industrial electronics society | 2005
S. Saggini; W. Stefanutti; D. Trevisan; Paolo Mattavelli; G. Garcea
Digitally controlled DC-DC converters are affected by quantization effects on A/D converters and digital pulse-width modulators (DPWMs) which may result in undesirable limit-cycle oscillations. Existing static and dynamic models predict the existence of only a small part of limit cycle oscillations, so that extensive time-domain simulations are usually needed in order to verify the presence of limit-cycle oscillations under different load and input voltage conditions. This paper proposes an alternative approach based on statistical models. Modelling the quantization error as a white noise, including the quantization effects on the controller and converter state variables, and evaluating the correlation between state variables, a statistical prediction of limit-cycle oscillations is obtained. By means of the proposed method, design criteria for the regulator parameters, in terms of achievable bandwidth, location of PID zeros and desired phase margin, can be derived. Simulation and experimental results confirm the validity of the proposed method.
power electronics specialists conference | 2005
D. Trevisan; Paolo Mattavelli; Paolo Tenti
This paper investigates the application of digital control for non-isolated single-inductor dual-output step-down dc-dc converters operating in continuous-conduction mode (CCM). The accurate and independent control of each output requires sophisticated digital control architecture so as to minimize cross-regulation problem. The adopted control includes a separate regulation of common-mode and differential-mode output voltages. Moreover, variable gain of the differential-mode regulator and a non-linear evaluation of the common-mode voltage have been investigated in order to improve the system dynamic response at different load conditions. Experimental investigation has been performed using discrete components, implementing the digital control in a field programmable gate array (FPGA). Simulation and experimental results on dual output converters (Vin =2.5/5 V, Vo1=Vo2=0.9/1.5 V, Io1=Io2=0/0.6 A) confirm the proposed analysis
conference of the industrial electronics society | 2005
D. Trevisan; W. Stefanutti; Paolo Mattavelli; Paolo Tenti
This paper investigates a digital control for non-isolated single-inductor multiple output (SIMO) step-down DC-DC converters using load current estimation. The proposed control architecture has been applied for SIMO converters operating in continuous conduction mode (CCM), where there is a cross-regulation issue between output voltages. The adopted control includes a separate regulation of the common-mode and the generalised differential-mode output voltages for the input half-bridge and for the output switches respectively. Due to the differential-mode control loop dependence on the load current, an inductor current estimation is used to perform a variable gain for the differential-mode regulation. Moreover, a non-linear evaluation of the common-mode voltage have been investigated in order to improve the system dynamic response at different load conditions. Even if aimed to an integrated solution, experimental investigation has been performed using discrete components, implementing the digital control in a field programmable gate array (FPGA). Simulation results on a three output converter and experimental results on dual output converter (V/sub in/=2.5/spl divide/5 V, V/sub o1/=V/sub o2/=0.9/spl divide/5 V, I/sub o1/=I/sub o2/=0/spl divide/0.6 A) confirm the proposed analysis.
conference of the industrial electronics society | 2006
Elisabetta Tedeschi; Paolo Mattavelli; D. Trevisan; Luca Corradini
This paper investigates the switching ripple compensation in multi-sampling digitally controlled Switched-Mode Power Supplies (SMPS) which is based on repetitive control. In integrated digital controllers for SMPS, the main bandwidth limitations come from A/D conversion time, calculation delays and the sample-and-hold effect for the Digital-Pulse-Width Modulation. When the former two are negligible with respect to the switching period, the overall phase lag is dominated by the DPWM, which can be strongly reduced by the multi-sampling approach, thus breaking the bandwidth limitation of the single-sampling solutions. The additional aliasing effects, which would require a filtering action, are avoided exploiting the periodic nature of the switching ripple under steady-state conditions. Since the proposed compensation does not interact with the main controller, the phase boost of the multi-sampling approach is maintained. Simulation and experimental results on a 1.2V - 10 A, 500 kHz synchronous buck converter, where the digital control has been implemented in a Field Programmable Gate Array (FPGA), confirm the properties of the proposed solution.
conference of the industrial electronics society | 2006
D. Trevisan; Paolo Mattavelli; Mauro Zigliotto; S. Saggini
This paper investigates the application of a limited-pool random pulse-width modulation (RPWM) to high frequency digitally controlled DC-DC power converters. The use of a suitably selected small number of switching frequencies ensures the generation of a flat and widespread spectrum, while limiting the system complexity, especially from the integrated circuit (IC) point of view; moreover the spreading action achieved is almost equivalent to the one obtained with a larger ensemble of frequencies. In the presented solution, the randomization action affects both the switching period and the turn-on interval, realizing the random carrier-frequency modulation with fixed duty cycle (RCFMFD). Moreover, the generation of the random number stream is based on a simple linear feedback shift register. The design of the switching frequencies pool and the evaluation of system performances have been realized using an accurate time-based model of the spectrum analyser. Experimental results on a DC-DC synchronous buck converter, where the digital control has been implemented in field programmable gate array (FPGA), confirm the properties of the proposed solution
power electronics specialists conference | 2007
D. Trevisan; Stefano Saggini; Paolo Mattavelli
This paper investigates a mixed signal voltage-mode controller for dc-dc converters based on hysteresis modulation. In the proposed control architecture both switch turn-on and switch turn-off instants are determined asynchronously by comparing the converter output voltage to the voltage ramp driven by the digital control using a digital-to-analog converter (DAC). Under the dynamic point of view, the achievable performances resemble those of a multi-loop control with an internal hysteresis current control based on the estimated inductor current. Moreover, the switching frequency is kept constant under steady-state conditions by modulating the amplitude of the DAC ramp. The proposed control features good dynamic performance, frequency modulation during transients and low-complexity, since it requires a DAC, a comparator and, more importantly, low signal-processing requirement. Simulation and experimental results on a synchronous buck converter, where the digital control has been implemented in a field programmable gate array (FPGA), are also reported.