Dai-Ying Lee

Multilevel resistive switching in Ti/CuxO/Pt memory devices

The multilevel resistive switching (RS) behaviors of the Ti/CuxO/Pt device were investigated by controlling the operated parameters of current and voltage bias in this study. We demonstrated that at least five-level memory states for data storage could be determined by controlling the current compliance, the span of voltage sweeping, and the amplitude of voltage pulse imposed on the memory device. During the dc voltage sweeping mode, not only the multilevel ON-states but also the multilevel OFF-states were achieved for the multilevel storage. The RS mechanism of the Ti/CuxO/Pt device is proposed to be related to the formation/rupture of the conducting filaments, arising from the interfacial oxygen ion migration between the Ti top electrode and CuxO films. Moreover, a possible conduction scenario for the multilevel RS behaviors is also suggested. Owing to all the multilevel memory states are distinguishable and possess the nondestructive readout property, it implies that the Ti/CuxO/Pt device has the promi...

Effects of Ti top electrode thickness on the resistive switching behaviors of rf-sputtered ZrO2 memory films

In this study, we propose a simple method to produce the various interface thicknesses within Ti/ZrO2 by changing the thickness of the Ti top electrode. As the Ti thickness increases, the induced interface thickness also increases to degrade the dielectric strength of the ZrO2, further lowering the forming voltage. However, when the interface layer is thick enough, it will trap sufficient charges to build up an opposite electric field to increase the forming voltage. The induced interface thickness is found to obviously affect the bias polarity of the resistive switching behavior and the device reliability. A fluctuant ON process is also demonstrated to be attributed to the competition between the formation and rupture of the conducting filaments.

Controllable oxygen vacancies to enhance resistive switching performance in a ZrO2-based RRAM with embedded Mo layer

In this study, the resistive switching characteristics of a ZrO(2)-based memory film with an embedded Mo layer are investigated. The experimental results show that the forming process can be removed by inserting an embedded Mo metal layer within ZrO(2) via a post-annealing process. The excellent memory performance, which includes lower operation voltage (<1.5 V), good endurance (>10(3) cycles), a stubborn nondestructive readout property (>10(4) s), and long retention time (>10(7) s), is also demonstrated. Moreover, high-speed operation (10 ns) can be successively maintained over 10(3) cycles without any operational errors observed in this memory device. Due to the interface layer induced by the Ti top electrode, the formation and rupture of conducting filaments are suggested to occur near the Ti/ZrO(2) interface. The oxygen vacancies induced by the embedded Mo can enhance the formation of conducting filaments and further improve the switching characteristics in ZrO(2)-based devices.

Electrical Properties and Fatigue Behaviors of ZrO2 Resistive Switching Thin Films

The resistive switching mechanisms of ZrO 2 memory films are proposed to explain why resistive switching characteristics of Ti/ZrO 2 /Pt device are more stable than those of Pt/ZrO 2 /Pt and Al/ZrO 2 /Pt devices in this study. Different from the Pt/ZrO 2 /Pt and the Al/ZrO 2 /Pt devices, the carrier conduction mechanisms in the Ti/ZrO 2 /Pt device obey space charge limited current theory, which may be caused by the formation of the interface layer between Ti and ZrO 2 . Moreover, the resistive switching mechanisms are proposed to be related to the filament formation/rupture theory and oxygen ion migration. The location where filament formation/rupture takes place should be confined near the interface between Ti and ZrO 2 , leading to the stable resistive switching characteristics and a better endurance performance. During successive resistive cycles at room temperature and 150°C, the fatigue behaviors are observed due to the degradation of both two memory states, which might be related to the transformation of the interface layers between Ti and ZrO 2 and the coalescence of ZrO x clusters.

Fabrication and resistive switching characteristics of high compact Ga-doped ZnO nanorod thin film devices

This study investigates the resistive switching behavior of Ga-doped ZnO (GZO) nanorod thin films with various Ga/Zn molar ratios. Vertically well-aligned and uniform GZO nanorod thin films were successfully grown on Au/Ti/SiO(2)/p-Si substrates using an aqueous solution method. X-ray diffraction (XRD) results indicate that GZO nanorods have [0001] highly preferred orientation. Scanning electron microscopy (SEM) and transmission electron microscopy (TEM) observations show the formation of highly ordered and dense nanorod thin films. These compact GZO nanorod thin films can be used to make resistive switching memory devices. Such memory devices can be reversibly switched between ON and OFF states, with a stable resistance ratio of ten times, narrow dispersion of ON and OFF voltages, and good endurance performance of over 100 cycles. The resistive switching mechanism in these devices is related to the formation and rupture of conducting filaments consisting of oxygen vacancies, occurring at interfaces between GZO nanorods (grain boundaries). Results show that the resulting compact GZO nanorod thin films have a high potential for resistive memory applications.

Forming-free resistive switching behaviors in Cr-embedded Ga2O3 thin film memories

Resistive switching behaviors are studied for the rapid thermal annealing (RTA) Ga2O3 thin film embedding a Cr metal layer. By modifying the thickness, area, and RTA temperature of the device, the thermal-induced resistive switching is similar to those induced by the electrical forming process. The conducting filaments composed of oxygen vacancies are created by the Cr diffusion and oxidization during RTA. The related carrier conduction mechanism obeys space charge limited conduction theory accompanied by the formation/rupture of the conducting filaments at the interface between Ti and Cr:Ga2O3 film. This study demonstrates a convenient process to fabricate forming-free resistive switching memory devices.

Unipolar resistive switching behavior in Pt/HfO2/TiN device with inserting ZrO2 layer and its 1 diode-1 resistor characteristics

Transition of resistive switching (RS) behavior from bipolar to unipolar is observed in Pt/ZrO2/HfO2/TiN device. Due to the lower oxygen vacancy concentration of the HfO2 layer, formation/rupture of the conducting filament is confined in the HfO2 layer. To fulfill one diode and one resistor (1D1R) structure, the electrical relation between the RS device and diode is investigated. A Pt/InZnO/CoO/Pt/TiN oxide diode is fabricated to provide enough forward current and large forward/reverse current ratio to achieve unipolar RS behavior. The 1D-1R structure with Pt/ZrO2/HfO2/TiN resistive random access memory shows robust retention and nondestructive readout property at 85 °C.

Unipolar Resistive Switching Characteristics of a

Oxygen ion migration is an important factor in the formation and rupture of a conducting filament to cause resistive switching (RS) behavior. A calcium oxide-doped zirconium oxide (CaO:ZrO2) oxygen ion conductor buffer layer is introduced between the Ti/ZrO2 interface of conventional Ti/ZrO2/Pt memory devices to improve their unipolar RS properties. Increasing the CaO doping concentration to 2 mol% introduces higher oxygen vacancy content within the CaO:ZrO2 buffer layer, leading to higher oxygen ion conductivity. This allows more oxygen ions to migrate from the oxygen reservoir laterally and vertically across the 2-mol% CaO:ZrO2 buffer layer to the region where the conducting filament forms and ruptures. Therefore, the Ti/2-mol% CaO:ZrO2/ZrO2/Pt device in this letter exhibits good endurance, high-speed switching (50 ns) without soft errors, stubborn nondestructive readout, and stable retention at 150°C.

\hbox{ZrO}_{2}

Unipolar resistive switching behaviors including bistable memory switching and monostable threshold switching were found in ZrO2 thin films fabricated by a simple sol–gel method with the Ti/ZrO2/Pt structure. The multilevel resistive switching behaviors were also revealed by varying the compliance current from 9 to 38 mA. Physical mechanisms based on a conductive filament model were proposed to explain the resistive switching phenomena and the device breakdown. A figure of merit Z = ρa/ρf was defined as a criterion for evaluating OFF/ON resistance ratio, where ρf and ρa represent the resistivities of the conductive filament and the fracture region of the filament, respectively. The advantages such as unipolar resistive switching, multilevel resistive switching, good scalability, low operation voltage ( 103), nondestructive readout, long retention (>104 s), and simple fabrication method make the ZrO2-based resistive switching device a promising candidate for next-generation nonvolatile memory applications.

Memory Device With Oxygen Ion Conductor Buffer Layer

Resistance of transition metal oxide (TMO) resistive random access memory (ReRAM) depends sharply on temperature, resulting in drastic memory window loss at high temperature. Thus, it is difficult to design the ReRAM that can serve a wide range of operating conditions. It is especially challenging to achieve multi-level-cell (MLC) ReRAM because of the large temperature dependency. This letter investigates both the temperature and read bias dependencies of WOx ReRAM, and found both can be well understood by a modified space-charge limited conduction model. Using this model, we have designed a novel read scheme that varies the read bias according to the device temperature and compensates for the temperature effect on cell resistance. Since TMO ReRAM devices depend on defect states, cell-to-cell and cycle-to-cycle variations are naturally large. An algorithm is designed to address the variability. A 1-Mb WOx ReRAM array is fabricated to both characterize the bias and temperature dependencies and verify the new read scheme. A large and constant memory window is preserved for MLC across a wide temperature range (-40 °C-125 °C), suitable for high-reliability applications.