David E. Seeger

Thin-film imaging: past, present, prognosis

As the limitations of conventional optical lithography approach, potential extensions of a current technology are examined more closely. One of these extensions is to limit the photoresist thickness that is needed for recording the imaging information. Because the low etch resistance of resist typically precludes the use solely of resists utilizing very thin film, a variety of alternatives have been explored. These range from elaborate trilayer schemes to relatively simple processes such as top-surface imaging (TSI) and a number of combinations thereof. In all of these systems, the aim is to limit the imaging resist thickness to a thin layer by confining the radiation near the surface of the resist. This improves process latitude (e.g., depth of focus, exposure latitude) and also reduces reflective notching and thin-film interference effects. The imaged pattern in the thin-film resist processed by TSI is then transferred by plasma etching into a thicker underlayer. This stack then serves as the resist mask for subsequent wafer processing. In this paper, we refer to all of these types of approaches as thin-film imaging (TFI) systems. We review TFI approaches from a historical perspective, examine a number of the schemes that have been proposed, and describe the various technical issues associated with the implementation of such systems. From this perspective, we suggest that TFI systems may find a role in manufacturing for lithographic applications at wavelengths at, or less than, 193 nm.

Fully scaled 0.5 μm metal–oxide semiconductor circuits by synchrotron x‐ray lithography: Mask fabrication and characterization

Several sets of x‐ray masks for a metal–oxide semiconductor (MOS) device program were fabricated using boron‐doped silicon as the membrane and gold as the absorber. The metrology of the mask sets was characterized. Mask‐to‐mask overlay error is <0.12 μm (3σ) including measurement error. Absorber induced distortion is not the dominating mask error. (Lack of better measurement systems and techniques preclude exact analysis of errors.) Quarter‐micron patterns have been resolved using a multilayer resist system. Linewidth variations are <0.017 μm (1σ) across the entire membrane. The mask sets have been successfully used to fabricate fully scaled n‐type MOS circuits.

Positive mode silylation process characterization

Abstract In this paper we wish to report on our progress in developing a positive TSI system with emphasis on what we believe is a novel approach for characterizing the silylation process.

Fabrication challenges for next-generation devices: Microelectromechanical systems for radio-frequency wireless communications

With wireless communications becoming an important technology and growth engine for the semiconductor industry, many semiconductor companies are developing technologies to differentiate themselves in this area. One means of accomplishing this goal is to find a way to integrate passive components, which currently make up more than 70% of the discrete components in a wireless handset, directly on-chip thereby greatly simplifying handsets. While a number of technologies are being investigated to allow on-chip integration, microelectromechanical systems technologies are an important part of this development effort. They have been used to create switches, filters, local oscillators, variable capacitors, and high-quality inductors, to name a few examples. The lithography requirements for these devices are very different than those found in standard semiconductor fabrication with the most important involving patterning over extreme topography. We discuss some of the fabrication challenges for these devices as well as some approaches that have been demonstrated to satisfy them.

Extension of 248-nm optical lithography: a thin film imaging approach

A negative-tone bilayer thin film imaged (TFI) resist has been developed for extension of 248 nm optical lithography to sub-150 nm regime. The bilayer TFI resist system consists of a thin (0.2 um) silicon containing top imaging layer and a thick (0.7 - 0.8 um) highly absorbing organic underlayer. The chemically amplified negative-tone top layer resist comprises of three major components: an aqueous base soluble silicon containing polymer, poly(hydroxybenzylsilsesquioxane); a crosslinking agent; and a photoacid generator. The highly absorptive underlayer is a hard baked novolak resist or a DUV ARC. Imaging of the top layer resist has shown resolutions down to 137.5 nm for line/space features and 130 nm for isolated features with 248 nm exposure tools and chrome on glass masks. The O2 reactive ion etch (RIE) selectively of the top layers versus a novolak underlayer is more than 25:1 as a result of the high silicon content in the silicon containing polymer. Furthermore, residue-free and nearly vertical wall profile image transfer to the underlayer has been achieved with RIE. Application of the negative-tone bilayer resist to 150 nm Gbit DRAM critical level lithography has been demonstrated. Resist line edge roughness is also discussed.

Fabrication of high performance 512K static‐random access memories in 0.25 μm complementary metal–oxide semiconductor technology using x‐ray lithography

Functional 512K static random access memory (SRAM) devices containing more than 3.6 million transistors have been successfully fabricated in a 0.25 μm complementary metal–oxide semiconductor technology using compact storage ring x‐ray lithography. In this demonstration a comparison of critical dimension control was made between x‐ray and optical (i‐line and excimer laser) lithography by fabricating SRAM devices using both lithographic techniques. For the x‐ray fabricated devices the channel length, a key device performance parameter, was controlled to within 0.036 μm (3σ), demonstrating the excellent process robustness, and dimensional control available from x‐ray lithography. These SRAMs had excellent electrical characteristics, including cycle times of 1.8 ns and access times of 3.7 ns. The ability of the existing x‐ray lithography infrastructure to produce a fully functional (‘‘perfect’’) chip has been demonstrated in a companion device fabrication program. A 512K SRAM chip of a slightly different desi...

Effect of photo acid generator concentration on the process latitude of a chemically amplified resist

A positive tone chemically amplified photoresist was evaluated for use on a 0.44 NA 248 nm excimer laser stepper. The effects of various formulation changes were examined with respect to exposure latitude, depth of focus, resolution, and bias between isolated and grouped features. Of particular interest was the relationship between the percent of photo acid generator (PAG) in the resist and the process latitude. It was found that several aspects of the process window increased as the PAG content of the resist decreased. An increase in dose was expected and observed with the decrease in PAG concentration. This would reduce excimer stepper throughput by approximately 25%.

Application of synchrotron x‐ray lithography to fabricate fully scaled 0.5 μm complementary metal–oxide semiconductor devices and circuits

High performance fully scaled 0.5 μm complementary metal–oxide semiconductors very large scale integrated (CMOS VLSI) circuits have been fabricated using synchrotron x‐ray lithography technology. X‐ray lithography is employed at all levels to attain a minimum feature size of 0.5 μm. The wafer exposures are done at the VUV storage ring from the National Synchrotron Light Source, Brookhaven National Laboratory. A stepper built at IBM Yorktown Heights is used at the beamline to perform the wafer exposures. All the lithography levels are aligned to the prefabricated 0.5 μm deep silicon trench zero level with an overlay less than 0.1 μm (1σ) between levels. Single level resists (both positive and negative) are used throughout the entire CMOS process. Linewidth control better than 0.01 μm and alignment tolerance less than 0.10 μm are accomplished. The patterning of this x‐ray lithography mask is accomplished through a vector scan electron beam direct writing system. Masks made of boron doped silicon membranes w...

New family of non-chemically amplified resists

Non-chemically amplified resists offer advantages over chemically-amplified (CA) resists because they are less susceptible to temperature variations and contaminants. In order for non-CA resists to be viable, they have to perform lithographically at an equivalent level with the CA resists from the point of view of quantum yield, resolution and etch resistance. We report here on new non-CA resists based on polymer esters that undergo deesterification to the corresponding acids upon exposure to UV, x-ray and e-beam radiation. The efficiency of the radiation reaction is surprisingly high. The resulting poly acids are base soluble and can be employed as positive working resists. The resists are composed of polymers and copolymers of methacrylate esters. The sensitivity of one derivative to x-ray is 75 mJ/cm2 and to e-beam is 1.0 (mu) C/cm2 at 10 KV. Best resolution obtained was 125 nm with x-ray radiation.

Fabrication of 64-Mb DRAM using x-ray lithography

This paper describes results achieved from the fabrication of 64Mb DRAM chips using x-ray lithography for the gate level. Three lots were split at the gate level for exposure with either Micrascan 92 at IBMs Advanced Semiconductor Technology Center (ASTC) or x-ray at the Advanced Lithography Facility (ALF) containing a Helios super-conducting storage ring and a Suss stepper. The x-ray mask was fabricated at MMD (Microlithographic Mask Development Facility) as a two-chip mask containing one chip which had zero defects. To achieve adequate overlay performance between the x-ray exposed gate level and previous optically- printed levels, the mask was fabricated with an intentional magnification correction. The alignment scheme for both Suss and Micrascan was first order to an ASM zero level, and second order to each other. Results from the first lot show 90% of the chips tested achieved a +/- 140 nm target for the Suss to Micrascan overlay. Critical dimension control (across wafer and across chip) was measured and found to be comparable between Suss and Micrascan. Electrical performance was comparable to the optical wafers. Chips were fabricated with zero defects in many of the 1 Mb segments. There were also x-ray fabricated chips which demonstrated 63 Mb addressable bits.