Derek K. Shaeffer

A 12 mW wide dynamic range CMOS front end for a portable GPS receiver

At submicron channel lengths, CMOS is an attractive alternative to silicon bipolar and GaAs MESFET technologies for use in wireless receivers. A 12mW Global Positioning System (GPS) receiver front-end, comprising a low noise amplifier (LNA) and mixer implemented in a standard 0.35/spl mu/m digital CMOS process, demonstrates the aptitude of CMOS for portable wireless applications.

Analysis and optimization of accumulation-mode varactor for RF ICs

This paper presents a novel RF IC varactor implemented in a standard CMOS process. This device has shown a remarkable tuning range of 150%, sensitivity of 300%/V, and quality factor of 23 at 1 GHz. A physical model of the varactor is presented and confirmed with measured data. Using the model derived, optimization has shown that a Q as high as 200 can be achieved.

A 115-mW, 0.5-/spl mu/m CMOS GPS receiver with wide dynamic-range active filters

This paper presents a 115-mW Global Positioning System radio receiver that is implemented in a 0.5-/spl mu/m CMOS technology. The receiver includes the complete analog signal path, comprising a low-noise amplifier, I-Q mixers, on-chip active filters, and 1-bit analog-digital converters. In addition, it includes a low-power phase-locked loop that synthesizes the first local oscillator. The receiver achieves a 2.8-dB noise figure (prelimiter), a 56-dB spurious-free dynamic range, and a 17-dB signal-to-noise ratio for a noncoherent digital back-end implementation when detecting a signal power of -130 dBm at the radio-frequency input.

Measuring and modeling the effects of substrate noise on the LNA for a CMOS GPS receiver

The influence of substrate noise generated in a digital circuit on the low-noise amplifier (LNA) of a CMOS GPS receiver has been experimentally characterized and theoretically analyzed. A frequency domain approach is used to model noise injection into the substrate from the digital circuitry and the mechanisms by which that noise can affect analog circuit behavior. The results reveal that substrate noise can modulate the LNA input signals as well as directly couple to the LNA output.

A 115 mW CMOS GPS receiver

The Global Positioning System (GPS) provides accurate positioning and timing information that is useful in many applications. In particular, portable consumer GPS applications require cheap compact low-power receivers. This 115 mW receiver, implemented in an analog 0.5 /spl mu/m CMOS technology, comprises the entire radio-frequency (RF) and analog sections in addition to the local oscillator (LO) frequency synthesizer and a pair of oversampled A/D converters.

Low-power dividerless frequency synthesis using aperture phase detection

A phase-locked-loop (PLL)-based frequency synthesizer incorporating a phase detector that operates on a windowing technique eliminates the need for a frequency divider. This new loop architecture is applied to generate the 1.573-GHz local oscillator (LO) for a Global Positioning System receiver. The LO circuits in the locked mode consume only 36 mW of the total 115-mW receiver power, as a result of the power saved by eliminating the divider. The PLLs loop bandwidth is measured to he 6 MHz, with a reference spurious level of -47 dBc. The front-end receiver, including the synthesizer, is fabricated in a 0.5-/spl mu/m, triple-metal, single-poly CMOS process and operates on a 2.5-V supply.

Comment on Corrections to “A 1.5-V, 1.5-GHz CMOS Low Noise Amplifier”

For original article see ibid., vol.32, no.5, p.745-59, May 1997. For the corrections see ibid., vol.40, no.6, p.1397-8, June 2005

Introduction to the Special Issue on the 2006 Radio Frequency Integrated Circuits (RFIC) Symposium

The 11 papers in this special issue are extended versions of papers presented at the 2006 Radio Frequency Integrated Circuits (RFIC) Symposium, held in San Francisco, CA, June 11-13, in conjunction with the International Microwave Symposium. They encompass topics in wireless receivers, wireless transceivers, wireless sensor networks, front-end circuitry and analog-to-digital (A/D) converters.