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Dive into the research topics where Devrim Yilmaz Aksin is active.

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Featured researches published by Devrim Yilmaz Aksin.


IEEE Journal of Solid-state Circuits | 2006

Switch Bootstrapping for Precise Sampling Beyond Supply Voltage

Devrim Yilmaz Aksin; Mohammad A. Al-Shyoukh; Franco Maloberti

Bootstrapped switches are used in a variety of applications including DC-DC converters, pipelined analog-to-digital converters and high voltage switches and drivers. Current work on highly integrated power management applications often requires the ability to measure voltage quantities that exceed the supply voltage in magnitude. This is primarily due to a basic need to maximize efficiency by running the power management IC on as low supply voltage as possible, while still maintaining the ability to sample and measure quantities from the surroundings that could well exceed the battery voltage. In this paper, a new bootstrapped switch is presented. The switch enables the precise sampling of input signals well greater than the chip supply voltage with no static power consumption, and without activating on-chip parasitic body diodes. The bootstrapped switch, presented here, is designed to sample an input signal with a 0-5.5-V range at a supply voltage of 2.75 V. Measurement data shows functionality for a 0-6-V input signal range with a supply voltage as low as 1.2 V


custom integrated circuits conference | 2005

A bootstrapped switch for precise sampling of inputs with signal range beyond supply voltage

Devrim Yilmaz Aksin; Mohammad A. Al-Shyoukh; Franco Maloberti

Bootstrapped switches are used in a variety of applications including DC-DC converters, pipelined analog-to-digital converters and high voltage switches and drivers. Current work on highly integrated power management applications often requires the ability to measure voltage quantities that exceed the supply voltage in magnitude. This is primarily due to a basic need to maximize efficiency by running the power management IC on as low supply voltage as possible, while still maintaining the ability to sample and measure quantities from the surroundings that could well exceed the battery voltage. In this paper a new bootstrapped switch is presented. The switch enables the precise sampling of input signals well greater than the chip supply voltage with no static power consumption, and without activating on-chip parasitic body diodes. The bootstrapped switch, presented here, is designed to sample an input signal with a 0-5.5 V range at a supply voltage of 2.75 V. Measurement data shows functionality for a 0-6 V input signal range with a supply voltage as low as 1.2 V


Microelectronics Journal | 2015

Voltage reference architectures for low-supply-voltage low-power applications

Pinar Basak Basyurt; Edoardo Bonizzoni; Devrim Yilmaz Aksin; Franco Maloberti

This paper presents a voltage reference generator architecture and two different realizations of it that have been fabricated within a standard 0.18µm CMOS technology. The architecture takes the advantage of utilizing a sampled-data amplifier (SDA) to optimize the power consumption. The circuits achieve output voltages on the order of 190mV with temperature coefficients of 43ppm/?C and 52.5ppm/?C over the temperature range of 0 to 120?C without any trimming with a 0.8V single supply. The power consumptions of the circuits are less then 500nW while occupying an area of 0.2mm2 and 0.08mm2, respectively.


european solid-state circuits conference | 2009

25V sampling switch for power management data converters in 0.35µm CMOS with DNMOS

Devrim Yilmaz Aksin; İlter Özkaya

A new high-voltage bootstrapped sampling switch with input signal range exceeding 11 times its supply voltage is presented. Proposed switch occupies a silicon area of 250µm by 160µm in 0.35µm twin-well CMOS process with drain extended NMOS (DNMOS) capability. The switch safe input signal range is restricted only by the DNMOS drain terminal breakdown voltage, i.e. 50V . Implemented switch can reliably track and hold 20VPP signal on 15VDC at 1MS/s with 2.2V supply without forward biasing any parasitic diode. A designed switched capacitor attenuator utilizing proposed high voltage switch can process 20VPP differential input reliably.


european solid-state circuits conference | 2014

A 490-nA, 43-ppm/°C, sub-0.8-V supply voltage reference

Pinar Basak Basyurt; Devrim Yilmaz Aksin; Edoardo Bonizzoni; Franco Maloberti

This paper presents a low power bandgap reference generator with 193-mV output voltage. The nominal supply voltage is 0.8 V, but the circuit can work with a supply down to 0.65 V. The circuit has been fabricated with a standard 0.18 μm CMOS technology and achieves a temperature coefficient of 43 ppm/°C for temperatures ranging from 0 to 120°C. A sampled-data amplifier consuming 140 nA and a reversed current-mode bandgap scheme draining 350 nA enable the achieved performance.


IEEE Journal of Solid-state Circuits | 2013

Fully Integrated Frequency Reference With 1.7 ppm Temperature Accuracy Within 0–80°C

Erdogan Ozgur Ates; Atılım Ergül; Devrim Yilmaz Aksin

A fully integrated 52 MHz frequency reference, designed in a 0.35 μm CMOS process, achieves 1.7 ppm frequency temperature accuracy within 0 to 80°C using a nonlinear compensation technique. The proposed low TCf0 reference oscillator achieves the lowest reported uncompensated temperature coefficient, i.e., 65.25 ppm/°C, among the integrated frequency references. The output reference frequency is obtained by dividing the differential LC Colpitts oscillator output operating at 1.6 GHz. Oscillator core dissipates 14 mW from 2.5 V. The blocks related to the temperature compensation scheme and the remaining system blocks consume 3 mW and 165 mW from 3.3 V supply, respectively. The measured phase noise of 52 MHz output is -94 dBc/Hz at 10 kHz offset frequency and rms period jitter is 3.2 ps.


international symposium on circuits and systems | 2007

An 11 Bit Sub-Ranging SAR ADC with Input Signal Range of Twice Supply Voltage

Devrim Yilmaz Aksin; Mohammad A. Al-Shyoukh; Franco Maloberti

Analog-to-digital converters are one of the essential components in modern highly integrated power management ICs (PMICs). Although, the conversion time and resolution requirements are relatively easy to achieve, the requirements such as extended input signal range exceeding the system supply level, low power consumption for higher system efficiency, and resilience to heavy substrate and supply noise complicate the design of the ADC. In this paper, an 11 bit sub-ranging SAR analog to digital converter designed for power management systems is presented. The supply voltage and the reference voltage of the converter are both equal to 2.75 V while any of its 8 input channels can vary between 0-5.5 V range (or twice the reference voltage). The integral and differential nonlinearities of the converter are 0.38 and 0.45 LSB respectively. The ADC draws only 140 muA of quiescent current and has a conversion time of 10 mus.


international symposium on circuits and systems | 2012

Design of a curvature-corrected bandgap reference with 7.5ppm/C temperature coefficient in 0.35µm CMOS process

Pinar Basak Basyurt; Devrim Yilmaz Aksin

This paper presents the design of high-precision curvature-corrected bandgap voltage reference circuit realized in 0.35μm CMOS technology. The circuit generates an output voltage of 500mV with temperature coefficient of 7.5ppm/C over a temperature range of -30C to 120C, with a power supply rejection ratio of 58dB at 100Hz, and an rms output noise of 5.33μV integrated from 0.1Hz to 10Hz. The circuit operates down to 1.8 volts with a line sensitivity of 0.12%/V. The design consumes 9.74μA of supply current, and occupies an area of 0.075mm2.


international symposium on circuits and systems | 2002

Very high-speed BJT buffer for track-and-hold amplifiers with enhanced linearity

Devrim Yilmaz Aksin; Franco Maloberti

This paper presents new design techniques to enhance low and high frequency track mode linearity of the switched emitter follower structure used in very high-speed track-and-hold amplifiers. Simulations using a 0.8 /spl mu/m 5 V SiGe BICMOS process and symbolic harmonic distortion analysis verify the performance of the proposed techniques. Analysis results show a third harmonic better than -105 dB with 1.5 V/sub pp/, at 100 MHz for a 1.6 pF hold capacitor.


international symposium on circuits and systems | 2014

Sampled-data operational-amplifier with ultra-low supply voltage and sub µW power consumption

Pinar Basak Basyurt; Devrim Yilmaz Aksin; Edoardo Bonizzoni; Franco Maloberti

This paper proposes the use of sampled-data operation in op-amps. The technique favors very low supply voltage and micro-power. After discussing the method at a general level, a possible sampled-data scheme is analyzed. Simulations with a low threshold technology show that a 0.5-V supply is possible. A version of the circuit, which has been integrated by using a standard 0.18-μm CMOS technology (with high thresholds), is able to operate at 0.65-V supply voltage. Simulation results show 42.5 dB of DC gain and 2.5-kHz bandwidth with 0.5-pF load capacitor. The power consumption is 63 nW. A pseudo-differential scheme doubles the consumed power and increases the DC gain by 6 dB.

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Pinar Basak Basyurt

Istanbul Technical University

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Erdogan Ozgur Ates

Istanbul Technical University

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Hayri Ugur Uyanik

Istanbul Technical University

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Atılım Ergül

Istanbul Technical University

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Çağrı Gürleyük

Istanbul Technical University

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İlter Özkaya

Istanbul Technical University

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Arda Akkaya

Istanbul Technical University

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