Didier Louis

Impact of Downstream Ash Plasmas on Ultra Low-k Materials

Introduction Next generation integrated circuits require novel materials with a dielectric constant lower than 2.5. To lower the dielectric constant, porous Methyl-SilsesQuioxane (MSQ) materials are introduced with a k value of about 2.2. The integration of these materials presents new processing issues, mainly due to a change in material density caused by the presence of the pores [1]. For instance, ash treatments for photoresist and residues removal are critical steps leading to dielectric properties modifications [2]. In this paper, we present the structure and properties modifications of porous and non-porous MSQ films under various downstream ash processes.

Impact of Organic Acid and Gas Bubbling on Copper and Copper Oxide Etch-Rates in Diluted HF Solution

In the damascene integration scheme, copper is used as an interconnect material. In a damascene integration scheme, the etch treatment by a plasma process leads to the formation of polymer residues, copper sputtered on the dielectric side wall, copper oxidation at the bottom of the via and copper precipitates at the hard mask surface. In order to remove these impurities, a post-via etch cleaning is mandatory [1]. Several aqueous cleaning solutions constituted of diluted HF and an organic acid were tested. Diluted HF was mainly used to remove the polymer residues and the organic acid to clean the copper surface. These mixtures were already studied and compatible with several porous and dense ULK materials [1]. In this paper, the impact of organic acids and gas bubbling in diluted HF solution on copper and copper oxide-dissolution rate is presented. Firslty the copper oxide and the copper etch-rates and the roughness were obtained from the kinetics of copper dissolution determined by X-ray reflectometry characterization [3]. Secondly, speciation calculations were performed in order to explain the copper etch-rates differences as a function of the solutions and gas bubbling.

Wafer-cleaning process after plasma metal etch

The developments associated with a new plasma etching technique for sub micron process using DUV resist has placed a new requirement on wafer cleaning technology. Not only does it require a chemical solution to remove the etching residue, it is desirable to reduce residual chlorine. In our study, a metal stack, including TiN ARC 400 angstroms/AlCu 6500 angstrom/ barrier TiN 600 angstrom, is patterned with DUV resist and etched in a single wafer etcher. The chlorine level on the wafer surface is determined using WDXRF analysis. We have made morphological observations of the wafer cleanliness using field emission scanning electron microscopy.

Improved post-etch cleaning of dual-damascene system for 0.18-μm technology

A key challenge for 0.18 micrometer technology is the interconnect RC delay time, which becomes the limiting factor for device performance. This delay can be reduced by combining the use of a material of low dielectric constant between metal lines and the use of copper, which is a better conductor than aluminum. In this paper some of the difficulties of integrating these types of interconnects are discussed, and a new strategy for post dielectric etch cleaning is presented.

Impact of Plasma and Diluted HF on a CoWP Material

Introduction Self-Aligned Barriers (SAB) are investigated to achieve reliable copper interconnects for the 45 nm technology node and beyond [1][2]. The integration of this material requires the study of the process impacts: plasma etch and ash, and cleaning process. In this study, the impact of several plasma treatments used in the integration and of a cleaning with diluted HF on a CoWP layer with Pd activation process was investigated. Samples were characterized by X-ray reflectometry and X-ray fluorescence spectrometry in order to assess the material modifications in terms of density, thickness and cobalt amount.

Copper decontamination ability of supercritical-CO2/additives on CVD and spin-on porous MSQ materials

The paper focused on the development of very dilute mixtures of chelating agents, acids and organic solvents for post etch residue (PER) removal and copper (Cu) low-k decontamination under supercritical CO 2 (SCCO 2 ) foradvanced nodes (< 65nm) BEOL integration. The Cu low-k decontamination ability of each mixture was carried out on Spin-On Dielectric (SOD) and Chemical Vapor Deposition (CVD) porous low-k. The copper decontamination ability of SCCO 2 /additives systems were also studied on ashed and unashed low-k blanket wafers. Finally, the paper presented the Cu decontamination performance and Cu PER removal ability of SCCO 2 /additive systems compared to conventional wet chemistries.

Cleaning techniques for low-K dielectric materials for advanced interconnects

The removal of photoresist and etch residues from inter- metal dielectrics using SB-SOM requires new strategies in order for the dielectric constant to remain low during stripping. In this paper we examine two silsesquioxane polymers. The first, HSQ, can be successfully cleaned by implementing a process using H2/N2 plasma in conjunction with PosistripTM EKCTM LE, while the second, MSQ, can be cleaned in a unique wet step with EKC325TM.

Study of Resist Strip Chemistries for Ultra Low-k/Cu Interconnect

New generation of integrated circuits requires the introduction of ultra low-k dielectric material (k < 2.5) to reduce the RC delay. One of the challenges in integrating these ultra low-k materials is the susceptibility of porous dielectric materials to the post etch resist stripping and residue clean processes. There have been studies comparing the effect of oxidization and reducing chemistries to the ultra low-k materials in a conventional asher [1]. There has also been report on the approach of using directional ashing to avoid damage to the ultra low-k materials [2]. In order to gain further understanding regarding the effect of oxidizing vs. reducing chemistries, ion vs. radicals, pressure and temperature to the low-k materials (both dense and porous), we have started a comprehensive study to find answers to these questions. This paper is to report our initial data from this effort.

Optimization of a SC CO2 Post-Etch Cleaning for Copper Interconnections

In a damascene integration scheme, porous dielectric materials are used for their insulating properties between copper interconnections. Plasma etch process generates impurities as polymer residues, copper sputtered on the dielectric side wall, and copper oxidation at the bottom of the via. In order to remove those impurities, a post-cleaning is mandatory [1]. In this study, cleaning is evaluated in supercritical CO2. This fluid is particularly interesting for its environmental friendliness, gas-liquid-like properties, for its compatibility with porous material [2] and it is a low chemicals consumer. Several mixtures of a sulfonic acid [3] with different chelating agents presenting specific chemical configurations and dissolved in ethanol were tested. Firstly, copper surface aspect (pitting corrosion and residues) and copper oxide dissolution were assessed by scanning electron microscopy and X-ray reflectometry respectively. Secondly, a porous PECVD material was integrated to test its compatibility with SC CO2 cleaning.

Resist stripping for advanced FEOL nodes : improvements to process based on ozone diffusion by use of additives

based on ozone diffusion by use of additives Olivier Louveau, Emile Lajoinie, Olivier Pollet, Jean Philippe Odet, Sylviane Cêtre, Laurent Lachal, Béatrice Icard, Evelyne Tabouret, Marc Veillerot, Hervé Fontaine, Didier Louis. 1 STMicroelectronics, 850 rue Jean Monnet 38921 CROLLES cedex, France a Olivier.Louveau@st.com 2 Semitool, Inc, 655 W. Reserve Drive 59901 KALISPELL MT, USA 3 CEA-Leti / D2NT, 17 rue des Martyrs 38054 GRENOBLE, France