Dimosthenis Peftitsis

Silicon Carbide Power Transistors: A New Era in Power Electronics Is Initiated

During recent years, silicon carbide (SiC) power electronics has gone from being a promising future technology to being a potent alternative to state-of-the-art silicon (Si) technology in high-efficiency, highfrequency, and high-temperature applications. The reasons for this are that SiC power electronics may have higher voltage ratings, lower voltage drops, higher maximum temperatures, and higher thermal conductivities. It is now a fact that several manufacturers are capable of developing and processing high-quality transistors at cost that permit introduction of new products in application areas where the benefits of the SiC technology can provide significant system advantages.

Challenges Regarding Parallel Connection of SiC JFETs

State-of-the-art silicon carbide switches have current ratings that are not sufficiently high to be used in high-power converters. It is, therefore, necessary to connect several switches in parallel in order to reach sufficient current capabilities. An investigation of parallel-connected normally ON silicon carbide JFETs is presented in this paper. The device parameters that play the most important role for the parallel connection are the pinch-off voltage, the gate-source reverse breakdown voltage, the spread in the on-state resistances, and the variations in static transfer characteristics of the devices. Moreover, it is experimentally shown that a fifth factor affecting the parallel connection of the devices is the parasitic inductances of the circuit layout. The temperature dependence of the gate-source reverse breakdown voltages is analyzed for two different designs of silicon carbide JFETs. If the spread in the pinch-off and gate-source reverse breakdown voltages is sufficiently large, there might be no possibility for a stable off-state operation of a pair of transistors without forcing one of the gate voltages to exceed the breakdown voltage. A solution to this problem using individual gate circuits for the JFETs is given. The switching performance of two pairs of parallel-connected devices with different combinations of parameters is compared employing two different gate-driver configurations. Three different circuit layouts are considered and the effect of the parasitic inductances is experimentally investigated. It is found that using a single gate circuit for the two mismatched JFETs may improve the switching performance and therefore the distribution of the switching losses significantly. Based on the measured switching losses, it is also clear that regardless of the design of the gate drivers, the lowest total switching losses for the devices are obtained when they are symmetrically placed.

Low-Loss High-Performance Base-Drive Unit for SiC BJTs

Driving a silicon carbide bipolar junction transistor is not a trivial issue, if low drive power consumption and short-switching times are desired. A dual-source base-drive unit with a speed-up capacitor consisting of a low- and a high-voltage source is, therefore, proposed in this paper. As a significant base current is required during the conduction state, the driver power consumption is higher than for other semiconductor switches. In the presented solution, the steady-state base current is provided by a low-voltage source and is optimized for low-power losses. On the contrary, a second source with a higher voltage and speed-up capacitor is used in order to improve the switching performance of the device. The proposed driver has experimentally been compared to other standard driver solutions by using a double-pulse circuit and a 2-kW dc/dc boost converter. Switching times of 20 ns at turn-ON and 35 ns at turn-OFF were recorded. Finally, the efficiency of the converter was determined experimentally at various switching frequencies. From power loss measurements at 100-kHz switching frequency using the proposed driver in a 2-kW dc/dc boost converter, it was found that the efficiency was approximately 99.0%. In the same operating point, the driver power consumption was only 0.08% of the rated power.

High-power modular multilevel converters with SiC JFETs

This paper studies the possibility of building a modular multilevel converter (M2C) using silicon carbide (SiC) switches. The main focus is on a theoretical investigation of the conduction losses of such a converter and a comparison to a corresponding converter with silicon-insulated gate bipolar transistors. Both SiC BJTs and JFETs are considered and compared in order to choose the most suitable technology. One of the submodules of a down-scaled 3 kVA prototype M2C is replaced with a submodule with SiC JFETs without antiparallel diodes. It is shown that the diodeless operation is possible with the JFETs conducting in the negative direction, leaving the possibility to use the body diode during the switching transients. Experimental waveforms for the SiC submodule verify the feasibility during normal steady-state operation. The loss estimation shows that a 300 MW M2C for high-voltage direct current transmission would potentially have an efficiency of approximately 99.8% if equipped with future 3.3 kV 1.2 kA SiC JFETs.

Parallel-Operation of Discrete SiC BJTs in a 6-kW/250-kHz DC/DC Boost Converter

This paper describes issues related to parallel connection of SiC bipolar junction transistors (BJTs) in discrete packages. The devices are applied in a high-frequency dc/dc boost converter where the switching losses significantly exceed the conduction losses. The design and construction of the converter is discussed with special emphasis on successful parallel-operation of the discrete BJTs. All considerations are experimentally illustrated by a 6-kW, 250-kHz boost converter (300 V/600 V). A special solution for the base-drive unit, based on the dual-source driver concept, is also shown in this paper. The performance of this driver and the current sharing of the BJTs are both presented. The power losses and thermal performance of the parallel-connected transistors have been determined experimentally for different powers and switching frequencies. An efficiency of 98.23% (±0.02%) was measured using a calorimetric setup, while the maximum temperature difference among the four devices is 12 °C.

Design steps towards a 40-kVA SiC inverter with an efficiency exceeding 99.5%

This paper describes the concept, the design, the construction, and experimental investigation of a 40 kVA inverter with Silicon Carbide Junction Field Effect Transistors. The inverter was designed to have an efficiency exceeding 99.5%. Due to the low losses free convection cooling could be used. Since no fans are used the reliability can be increased compared to solutions with fans. A very low conduction loss has been achieved by parallel connecting ten 85 mΩ normally-on JFETs in each switch position. A special gate-drive solution was applied forcing the transistors to switch very fast (approx. 20 kV/μs) resulting in very low switching losses. As the output power is almost equal to the input power a special effort was done to precisely determine the amount of semiconductor power losses via comparative thermal measurements. A detailed analysis of the measurements shows that the efficiency of the inverter is approximately 99.7% at 40 kVA.

Experimental investigations of static and transient current sharing of parallel-connected silicon carbide MOSFETs

An Experimental performance analysis of a parallel connection of two 1200/80 MΩ silicon carbide SiC MOSFETs is presented. Static parallel connection was found to be unproblematic. The switching performance of several pairs of parallel-connected MOSFETs is shown employing a common simple totem-pole driver. Good transient current sharing and high-speed switching waveforms with small oscillations are presented. To conclude this analysis, a dc/dc boost converter using parallel-connected SiC MOSFETs is designed for stepping up a voltage from 50 V to 560 V. It has been found that at high frequencies, a mismatch in switching losses results in thermal unbalance between the devices.

Self-Powered Gate Driver for Normally ON Silicon Carbide Junction Field-Effect Transistors Without External Power Supply

The very low on-state resistance, the voltage-controlled gate, and the relative simplicity of fabrication of the normally ON silicon carbide junction field-effect transistor (JFET) make this device the most important player among all state-of-the-art silicon carbide transistors. However, the normally ON nature counts as the main factor which keeps this device far from being considered as an alternative to the silicon insulated-gate bipolar transistor. A self-powered gate driver without external power supply for normally ON silicon carbide JFETs is presented in this paper. The proposed circuit is able to handle the short-circuit currents when the devices are subjected to the dc-link voltage by utilizing the energy associated with this current. On the other hand, it supplies the necessary negative gate-source voltage during the steady-state operation. A detailed description of the operating states in conjunction with a theoretical analysis of the proposed self-powered gate driver is presented. The first part of the experimental investigation has been performed when the proposed circuit is connected to a device which is directly subjected to the dc-link voltage. The second set of measurements were recorded when the self-powered gate-driver was employed as the driver of normally ON components in a half-bridge converter. From the experimental results, it is shown that the short-circuit current is cleared within approximately 20 μs after the dc-link voltage is applied, while the power consumption when all devices are kept in the OFF state equals 0.37 W. Moreover, it is experimentally shown that the proposed gate driver can properly switch when it is employed in a half-bridge converter. Finally, limitations regarding the range of the applications where the self-powered gate drive can efficiently operate are also discussed.

Design Steps Toward a 40-kVA SiC JFET Inverter With Natural-Convection Cooling and an Efficiency Exceeding 99.5%

This paper describes the concept, design, construction, and experimental investigation of a 40-kVA inverter with silicon carbide junction field-effect transistors (JFETs). The inverter was designed to reach an efficiency exceeding 99.5%. The size of the heat sink is significantly reduced in comparison to silicon insulated-gate bipolar transistor designs, and the high efficiency makes it possible to use free-convection cooling. This could potentially increase reliability compared with solutions with fans. A very low conduction loss has been achieved by parallel connecting ten 85-mΩ normally-ON JFETs in each switch position. A special gate-drive solution was applied, forcing the transistors to switch very fast (approximately 10 kV/μs), resulting in very low switching losses. As output power is almost equal to input power, special effort was done to precisely determine the amount of semiconductor power losses via comparative thermal measurements. A detailed analysis of the measurements shows that the efficiency of the inverter is close to 99.7% at 40 kVA.

An Experimental Evaluation of SiC Switches in Soft-Switching Converters

Soft-switching converters equipped with insulated gate bipolar transistors (IGBTs) in silicon (Si) have to be dimensioned with respect to additional losses due to the dynamic conduction losses originating from the conductivity modulation lag. Replacing the IGBTs with emerging silicon carbide (SiC) transistors could reduce not only the dynamic conduction losses but also other loss components of the IGBTs. In the present paper, therefore, several types of SiC transistors are compared to a state-of-the-art 1200-V Si IGBT. First, the conduction losses with sinusoidal current at a fixed amplitude (150 A) are investigated at different frequencies up to 200 kHz. It was found that the SiC transistors showed no signs of dynamic conduction losses in the studied frequency range. Second, the SiC transistors were compared to the Si IGBT in a realistic soft-switching converter test system. Using a calorimetric approach, it was found that all SiC transistors showed loss reductions of more than 50%. In some cases loss reductions of 65% were achieved even if the chip area of the SiC transistor was only 11% of that of the Si IGBT. It was concluded that by increasing the chip area to a third of the Si IGBT, the SiC vertical trench junction field-effect transistor could yield a loss reduction of approximately 90%. The reverse conduction capability of the channel of unipolar devices is also identified to be an important property for loss reductions. A majority of the new SiC devices are challenging from a gate/base driver point-of-view. This aspect must also be taken into consideration when making new designs of soft-switching converters using new SiC transistors.