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Dive into the research topics where Dirk Manger is active.

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Featured researches published by Dirk Manger.


bipolar/bicmos circuits and technology meeting | 2015

SiGe HBT and BiCMOS process integration optimization within the DOTSEVEN project

Josef Böck; Klaus Aufinger; Sabine Boguth; C. Dahl; Herbert Knapp; Wolfgang Liebl; Dirk Manger; Thomas Meister; Andreas Pribil; Jonas Wursthorn; Rudolf Lachner; Bernd Heinemann; Holger Rücker; A. Fox; R. Barth; Gerhard G. Fischer; S. Marschmeyer; D. Schmidt; A. Trusch; C. Wipf

This paper describes the technology development activities within the European funding project DOTSEVEN done by Infineon and IHP. After half of the project duration Infineon has developed a 130 nm SiGe BiCMOS technology with fT of 250 GHz and fmax of 370 GHz. State-of-the-art MMIC performance is demonstrated by a 77 GHz automotive radar transmitter. The suitability of IHṔs advanced SiGe HBT module with epitaxial base link for future industrial BiCMOS platforms is demonstrated by integrating it in Infineons 130 nm process resulting in an fmax of 500 GHz, 1.8 ps gate delay and a record 161 GHz static frequency divider. IHP has achieved an fmax of 570 GHz for the first time using an HBT concept with non-selective epitaxial base deposition and an elevated extrinsic base.


IEEE Electron Device Letters | 2015

Advanced Heterojunction Bipolar Transistor for Half-THz SiGe BiCMOS Technology

Alexander Fox; Bernd Heinemann; Holger Rücker; Rainer Barth; Gerhard G. Fischer; Christian Wipf; Steffen Marschmeyer; Klaus Aufinger; Josef Böck; Sabine Boguth; Herbert Knapp; Rudolf Lachner; Wolfgang Liebl; Dirk Manger; Thomas Meister; Andreas Pribil; Jonas Wursthorn

The high-frequency performance of a novel SiGe heterojunction bipolar transistor (HBT) module with monocrystalline base link is investigated in an industrial 0.13-μm BiCMOS environment. The main feature of this new HBT module is a significant reduction of the external base resistance as shown here by direct comparison with a conventional double-poly-silicon technology. Peak fT/fmax values of 300/500 GHz are achieved. A minimum current-mode logic ring oscillator gate delay of 1.8 ps and a record operation frequency for a SiGe static frequency divider of 161 GHz are demonstrated.


Archive | 2003

Method for forming a hard mask in a layer on a planar device

Dirk Manger; Matthias Goldbach


Archive | 2004

Architecture for vertical transistor cells and transistor-controlled memory cells

Till Schloesser; Dirk Manger; Bernd Goebel


Archive | 2006

Hard Mask Layer Stack And A Method Of Patterning

Dirk Manger; Hocine Boubekeur; Martin Verhoeven; Nicolas Nagel; Thomas Tatry; Dirk Caspary; Matthias Markert


Archive | 2004

FinFet device and method of fabrication

Dirk Manger


Archive | 1999

DRAM memory cell

Richard Johannes Luyken; Franz Hofmann; Lothar Risch; Dirk Manger; Wolfgang Rösner; Till Schlösser; Michael Specht


Archive | 2004

DRAM memory cell and method for fabricating such a DRAM memory cell

Richard Johannes Luyken; Franz Hofmann; Lothar Risch; Dirk Manger; Wolfgang Rösner; Till Schlösser; Michael Specht


Archive | 2005

Memory cell array and method of manufacturing the same

Dirk Manger; Stefan Slesazeck; Stefan Tegen; Klaus Muemmler; Alexander Sieck


Archive | 2004

DRAM cell array having vertical memory cells and methods for fabricating a DRAM cell array and a DRAM

Dirk Manger; Till Schloesser; Rolf Weis; Bernd Goebel; Wolfgang Mueller; Joachim Nuetzel; Klaus Muemmler

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