Dirk Scheideler
Infineon Technologies
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Publication
Featured researches published by Dirk Scheideler.
international solid-state circuits conference | 2006
Edoardo Prete; Dirk Scheideler; Anthony Sanders
An architecture for next-generation memory interface is demonstrated using 90nm bulk silicon to provide a 2-tap emphasized TX with <19ps jitter at 9.6Gb/s. The circuit uses a programmable PLL to track jitter up to 200MHz. The transceiver consumes 100mW from a 1V supply
Archive | 2006
Edoardo Prete; Hans-Peter Trost; Anthony Sanders; Gernot Steinlesberger; Maurizio Skerlj; Dirk Scheideler; Georg Braun; Steve Wood; Richard Johannes Luyken
Archive | 2006
Edoardo Prete; Hans-Peter Trost; Anthony Sanders; Dirk Scheideler; Georg Braun; Steve Wood; Richard Johannes Luyken
Archive | 2006
Anthony Sanders; Dirk Scheideler; Edoardo Prete
Archive | 2004
Philipp Börker; Bruno Celli-Urbani; Dirk Friebe; David Müller; Edoardo Prette; Volkmar Rebmann; Anthony Sanders; Dirk Scheideler
Archive | 2008
Christoph Bilger; Peter Gregorius; Michael Bruennert; Maurizio Skerlj; Wolfgang Walthes; Johannes Stecker; Hermann Ruckerbauer; Dirk Scheideler
Archive | 2007
Michael Bruennert; Christoph Bilger; Peter Gregorius; Maurizio Skerlj; Wolfgang Walthes; Johannes Stecker; Hermann Ruckerbauer; Dirk Scheideler; Roland Barth
Archive | 2004
Philipp Börker; Dirk Scheideler
Archive | 2008
Christoph Bilger; Peter Gregorius; Michael Bruennert; Maurizio Skerlj; Wolfgang Walthes; Johannes Stecker; Hermann Ruckerbauer; Dirk Scheideler
Archive | 2004
Dirk Scheideler; Philipp Börker